• Simon Guo's avatar
    core:ppc Fix 2 interleave logic errors in vsx_utils.hpp · 2610a47c
    Simon Guo authored
    When elements are 64 bits, the vec_st_interleave()/vec_ld_deinterleave()
    doesn't interleave 4 elements correctly.
    
    For vec_st_interleave(), following is saved into mem:
    	a0 b0 a1 b1 c0 d0 c1 d1
         -> we expected:
    	a0 b0 c0 d0 a1 b1 c1 d1
    
    for vec_ld_deinterleave(), following is loaded into a b c d for memory
    string { 1 2 3 4 5 6 7 8 }:
    	a: 1 3
    	b: 2 4
    	c: 5 7
    	d: 6 8
       -> we expected:
       	a: 1 5
    	b: 2 6
    	c: 3 7
    	d: 4 8
    
    This patch corrects this behavior.
    Signed-off-by: 's avatarSimon Guo <wei.guo.simon@gmail.com>
    2610a47c
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