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submodule
opencv
Commits
4babecf3
Commit
4babecf3
authored
Oct 09, 2014
by
Ilya Lavrenov
Browse files
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Plain Diff
fixes for cv::addWeighted and cv::Mat::dot
parent
183e378b
Show whitespace changes
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Showing
2 changed files
with
9 additions
and
9 deletions
+9
-9
arithm.cpp
modules/core/src/arithm.cpp
+8
-8
matmul.cpp
modules/core/src/matmul.cpp
+1
-1
No files found.
modules/core/src/arithm.cpp
View file @
4babecf3
...
@@ -2638,8 +2638,8 @@ struct AddWeighted_SIMD<schar, float>
...
@@ -2638,8 +2638,8 @@ struct AddWeighted_SIMD<schar, float>
out_f_l
=
vaddq_f32
(
out_f_l
,
g
);
out_f_l
=
vaddq_f32
(
out_f_l
,
g
);
out_f_h
=
vaddq_f32
(
out_f_h
,
g
);
out_f_h
=
vaddq_f32
(
out_f_h
,
g
);
int16x4_t
out_16_l
=
vqmovn_s32
(
vcvt
q_s32_f32
(
out_f_l
));
int16x4_t
out_16_l
=
vqmovn_s32
(
cv_vrnd
q_s32_f32
(
out_f_l
));
int16x4_t
out_16_h
=
vqmovn_s32
(
vcvt
q_s32_f32
(
out_f_h
));
int16x4_t
out_16_h
=
vqmovn_s32
(
cv_vrnd
q_s32_f32
(
out_f_h
));
int16x8_t
out_16
=
vcombine_s16
(
out_16_l
,
out_16_h
);
int16x8_t
out_16
=
vcombine_s16
(
out_16_l
,
out_16_h
);
int8x8_t
out
=
vqmovn_s16
(
out_16
);
int8x8_t
out
=
vqmovn_s16
(
out_16
);
...
@@ -2666,11 +2666,11 @@ struct AddWeighted_SIMD<ushort, float>
...
@@ -2666,11 +2666,11 @@ struct AddWeighted_SIMD<ushort, float>
float32x4_t
v_s1
=
vmulq_n_f32
(
vcvtq_f32_u32
(
vmovl_u16
(
vget_low_u16
(
v_src1
))),
alpha
);
float32x4_t
v_s1
=
vmulq_n_f32
(
vcvtq_f32_u32
(
vmovl_u16
(
vget_low_u16
(
v_src1
))),
alpha
);
float32x4_t
v_s2
=
vmulq_n_f32
(
vcvtq_f32_u32
(
vmovl_u16
(
vget_low_u16
(
v_src2
))),
beta
);
float32x4_t
v_s2
=
vmulq_n_f32
(
vcvtq_f32_u32
(
vmovl_u16
(
vget_low_u16
(
v_src2
))),
beta
);
uint16x4_t
v_dst1
=
vqmovn_u32
(
vcvt
q_u32_f32
(
vaddq_f32
(
vaddq_f32
(
v_s1
,
v_s2
),
g
)));
uint16x4_t
v_dst1
=
vqmovn_u32
(
cv_vrnd
q_u32_f32
(
vaddq_f32
(
vaddq_f32
(
v_s1
,
v_s2
),
g
)));
v_s1
=
vmulq_n_f32
(
vcvtq_f32_u32
(
vmovl_u16
(
vget_high_u16
(
v_src1
))),
alpha
);
v_s1
=
vmulq_n_f32
(
vcvtq_f32_u32
(
vmovl_u16
(
vget_high_u16
(
v_src1
))),
alpha
);
v_s2
=
vmulq_n_f32
(
vcvtq_f32_u32
(
vmovl_u16
(
vget_high_u16
(
v_src2
))),
beta
);
v_s2
=
vmulq_n_f32
(
vcvtq_f32_u32
(
vmovl_u16
(
vget_high_u16
(
v_src2
))),
beta
);
uint16x4_t
v_dst2
=
vqmovn_u32
(
vcvt
q_u32_f32
(
vaddq_f32
(
vaddq_f32
(
v_s1
,
v_s2
),
g
)));
uint16x4_t
v_dst2
=
vqmovn_u32
(
cv_vrnd
q_u32_f32
(
vaddq_f32
(
vaddq_f32
(
v_s1
,
v_s2
),
g
)));
vst1q_u16
(
dst
+
x
,
vcombine_u16
(
v_dst1
,
v_dst2
));
vst1q_u16
(
dst
+
x
,
vcombine_u16
(
v_dst1
,
v_dst2
));
}
}
...
@@ -2694,11 +2694,11 @@ struct AddWeighted_SIMD<short, float>
...
@@ -2694,11 +2694,11 @@ struct AddWeighted_SIMD<short, float>
float32x4_t
v_s1
=
vmulq_n_f32
(
vcvtq_f32_s32
(
vmovl_s16
(
vget_low_s16
(
v_src1
))),
alpha
);
float32x4_t
v_s1
=
vmulq_n_f32
(
vcvtq_f32_s32
(
vmovl_s16
(
vget_low_s16
(
v_src1
))),
alpha
);
float32x4_t
v_s2
=
vmulq_n_f32
(
vcvtq_f32_s32
(
vmovl_s16
(
vget_low_s16
(
v_src2
))),
beta
);
float32x4_t
v_s2
=
vmulq_n_f32
(
vcvtq_f32_s32
(
vmovl_s16
(
vget_low_s16
(
v_src2
))),
beta
);
int16x4_t
v_dst1
=
vqmovn_s32
(
vcvt
q_s32_f32
(
vaddq_f32
(
vaddq_f32
(
v_s1
,
v_s2
),
g
)));
int16x4_t
v_dst1
=
vqmovn_s32
(
cv_vrnd
q_s32_f32
(
vaddq_f32
(
vaddq_f32
(
v_s1
,
v_s2
),
g
)));
v_s1
=
vmulq_n_f32
(
vcvtq_f32_s32
(
vmovl_s16
(
vget_high_s16
(
v_src1
))),
alpha
);
v_s1
=
vmulq_n_f32
(
vcvtq_f32_s32
(
vmovl_s16
(
vget_high_s16
(
v_src1
))),
alpha
);
v_s2
=
vmulq_n_f32
(
vcvtq_f32_s32
(
vmovl_s16
(
vget_high_s16
(
v_src2
))),
beta
);
v_s2
=
vmulq_n_f32
(
vcvtq_f32_s32
(
vmovl_s16
(
vget_high_s16
(
v_src2
))),
beta
);
int16x4_t
v_dst2
=
vqmovn_s32
(
vcvt
q_s32_f32
(
vaddq_f32
(
vaddq_f32
(
v_s1
,
v_s2
),
g
)));
int16x4_t
v_dst2
=
vqmovn_s32
(
cv_vrnd
q_s32_f32
(
vaddq_f32
(
vaddq_f32
(
v_s1
,
v_s2
),
g
)));
vst1q_s16
(
dst
+
x
,
vcombine_s16
(
v_dst1
,
v_dst2
));
vst1q_s16
(
dst
+
x
,
vcombine_s16
(
v_dst1
,
v_dst2
));
}
}
...
@@ -2801,8 +2801,8 @@ addWeighted8u( const uchar* src1, size_t step1,
...
@@ -2801,8 +2801,8 @@ addWeighted8u( const uchar* src1, size_t step1,
out_f_l
=
vaddq_f32
(
out_f_l
,
g
);
out_f_l
=
vaddq_f32
(
out_f_l
,
g
);
out_f_h
=
vaddq_f32
(
out_f_h
,
g
);
out_f_h
=
vaddq_f32
(
out_f_h
,
g
);
uint16x4_t
out_16_l
=
vqmovun_s32
(
vcvt
q_s32_f32
(
out_f_l
));
uint16x4_t
out_16_l
=
vqmovun_s32
(
cv_vrnd
q_s32_f32
(
out_f_l
));
uint16x4_t
out_16_h
=
vqmovun_s32
(
vcvt
q_s32_f32
(
out_f_h
));
uint16x4_t
out_16_h
=
vqmovun_s32
(
cv_vrnd
q_s32_f32
(
out_f_h
));
uint16x8_t
out_16
=
vcombine_u16
(
out_16_l
,
out_16_h
);
uint16x8_t
out_16
=
vcombine_u16
(
out_16_l
,
out_16_h
);
uint8x8_t
out
=
vqmovn_u16
(
out_16
);
uint8x8_t
out
=
vqmovn_u16
(
out_16
);
...
...
modules/core/src/matmul.cpp
View file @
4babecf3
...
@@ -3008,7 +3008,7 @@ static double dotProd_32f(const float* src1, const float* src2, int len)
...
@@ -3008,7 +3008,7 @@ static double dotProd_32f(const float* src1, const float* src2, int len)
return
r
;
return
r
;
setIppErrorStatus
();
setIppErrorStatus
();
#elif CV_NEON
#elif CV_NEON
int
len0
=
len
&
-
4
,
blockSize0
=
(
1
<<
1
5
),
blockSize
;
int
len0
=
len
&
-
4
,
blockSize0
=
(
1
<<
1
3
),
blockSize
;
float32x4_t
v_zero
=
vdupq_n_f32
(
0.0
f
);
float32x4_t
v_zero
=
vdupq_n_f32
(
0.0
f
);
CV_DECL_ALIGNED
(
16
)
float
buf
[
4
];
CV_DECL_ALIGNED
(
16
)
float
buf
[
4
];
...
...
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