* [MLIR] Disable support for boolean type in MLIR

Ops on boolean types are currently not supported by MLIR Compiler until
the proper i1<->i8 type conversion mechanism is in place.

* Add example.

* Fix typo

* Stage README for review pre-release

* Latest README graphic

* Update links on README

* Copy outputs only if the use is outside the sub-graph

* Use unordered_set find

* Fix cycle detection during sub-graph construction

* small refactor

* style-apply

* - Add graph pass method for onnx lstmcell rewrite with lstm cpu op
- insert reshapes to keep the weights in ldigo format
- test case for onnx LstmCell to CPU Lstm

* fix typo

* - check LSTMCell for the fused op decomposistion in the backend

* - fix bug in onnx_lstm graph pass
- passes unit test

* style-fix

* - fix compilation error
- use IFCO gate ordering for bias

*  - Skip LSTMCell to LSTM CPU fusion for peephole

* - add comment && remove duplicate function

* -use dynamic_pointer_cast to check for constant

* - onnx bias will be of shape (2 * gates_count * hidden_size) bias of Wb and Rb are concatenated, we will split the bias, add and rearrange in order IFCO

* - Use most derived LSTM ctor for pattern matching

* - Style Fix

* style fix

* Address PR comments

* - add support for graph pass (MKLDNN version > 1) for mapping LSTMCell -> LSTM CPU op

* fix unit test failure for MKLDNN V1.0

* [FUSED] Change alpha attribute in Elu from dynamic to static

* Fix python API

* Fix failing python test

* Remove unnecesary test

* Fix merge artifact

* Review fix I

* Review Fix PyAPI

Python rounding is not supported yet in nGraph dialect.

CPU fusion is disabled in MLIR since fused ops are not supported in
nGraph dialect. CPU debug tracer test doesn't expect CompiledKernel ops
generated for MLIR.

* Add method to check if an Executable can create tensors

* Add a Backend check to see if Executable can create tensors

* Update per review comment

* style

* update fused_clamp

* convert all f64 to f32

* [MLIR] Bump MLIR repo to commit c636f12, 08/09/2019

MLIR Commit:
commit c636f127ee412ef7279ec0d550f42740824cd9ea
Author: Alex Zinenko <zinenko@google.com>
Date:   Fri Aug 9 08:59:45 2019 -0700

    LLVM dialect and translation: support global strings

LLVM Commit:
commit c636f127ee412ef7279ec0d550f42740824cd9ea
Author: Alex Zinenko <zinenko@google.com>
Date:   Fri Aug 9 08:59:45 2019 -0700

    LLVM dialect and translation: support global strings

* [MLIR] Set optimization level for LLVM optimizer and codegen

Now both LLVM optimizer and codegen are aligned with
"NGRAPH_MLIR_OPT_LEVEL" macro.

* [MLIR] Enable LLVM vectorization by initializing TTI

This is the final piece to enable LLVM vectorization for MLIR compiler.
The PR refactors the creation of a target machine in MLIRCompiler so that
we can use it to initialize TargetTransformInfo with the proper host
features and LLVM Loop Vectorizer can get the right vector register
information of the target CPU.

* Axes input was added to LRN

* Unit tests for axes shape check were added

* LRN node deserialization was updated

* Fixed EOF and clang style applied

* Changed Constant to Parameter type in unit tests

* Fixed LRN assert description

* Fixed copy_with_new_args

* Clang style applied

* wip

* parse working with one test

* Add version information query and unit tests for parsing version strings

* add more comments

* doc strings

* style

Now both LLVM optimizer and codegen are aligned with
"NGRAPH_MLIR_OPT_LEVEL" macro.

* Update cpu backend to support i32 with topk

* Add topk i32 unit test

* Minor fix in unit-test

* disable test for plaidml

MLIR Commit:
commit c636f127ee412ef7279ec0d550f42740824cd9ea
Author: Alex Zinenko <zinenko@google.com>
Date:   Fri Aug 9 08:59:45 2019 -0700

    LLVM dialect and translation: support global strings

LLVM Commit:
commit c636f127ee412ef7279ec0d550f42740824cd9ea
Author: Alex Zinenko <zinenko@google.com>
Date:   Fri Aug 9 08:59:45 2019 -0700

    LLVM dialect and translation: support global strings

* Add negative op

* Add test case

* Address feedback

* Merge master

* Consolidate to one routine for unary ops

* Change from Negative to Neg

* [MLIR] Enable affine loop tiling

This PR enables loop tiling optimization in affine dialect. It
introduces the following flags for configuration.
  - affine-loop-tile: enables/disables the optimization. Disabled by
    default.
  - loop-tile-cache-level: provides the cache level to which apply loop
    tiling to. Cache level size is obtained from LLVM's TTI.
  - loop-tile-cache-size: provides a cache level size that overrides
    cache information from TTI.

The current use of TTI is a bit hacky since we have to pass a fake
LLVM's function to make it work. However, this should be enough to get
some basic target information until we have a target model in MLIR or
find a better approach.

* Address feedback

* Rename flags

* Fix sum reference to handle corner cases with +-inf

* Review comments, and try to make Windows happy

* Update GPU unit_test.manifest

* More template grindery, to make macOS happy

* wip

* compiles and links

* style

* wip

* parse working with one test

* Add version information query and unit tests for parsing version strings

* add more comments

* doc strings

* style

Remove not-directly-used includes

* Fix crash when NGRAPH_ENABLE_{VISUALIZE,SERIALIZE}_TRACING=1

* Initialization for kw

Cyphers/25tomaster