Commit b93bc02a authored by Deomid Ryabkov's avatar Deomid Ryabkov Committed by Cesanta Bot

Delete mos tool and related libraries from dev

Moved to https://github.com/mongoose-os/mos

PUBLISHED_FROM=8a0475678dba38fd6e057b8a530e9d08054ff74f
parent 747e393a
Copyright (c) 2011 The stlink project (github.com/texane/stlink) contributors.
All rights reserved.
Copyright (c) 2011 The "Capt'ns Missing Link" Authors. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following
disclaimer in the documentation and/or other materials provided
with the distribution.
* Neither the name of Martin Capitanio nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
This diff is collapsed.
/* simple wrapper around the stlink_flash_write function */
#include <signal.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/types.h>
#include "stlink.h"
#include "usb.h"
#define FLASH_ADDRESS 0x8000000
int stm32_flash(const char *device_name, void *data, int len) {
stlink_t *sl = NULL;
int err = -1;
uint8_t serial[16];
int j = (int) strlen(device_name);
int length = j / 2; // the length of the destination-array
if (j % 2 != 0) return -1;
for (size_t k = 0; j >= 0 && k < sizeof(serial); ++k, j -= 2) {
char buffer[3] = {0};
memcpy(buffer, device_name + j, 2);
serial[length - k] = (uint8_t) strtol(buffer, NULL, 16);
}
sl = stlink_open_usb(1, (char *) serial);
if (sl == NULL) return -1;
if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
if (stlink_exit_dfu_mode(sl)) {
printf("Failed to exit DFU mode\n");
goto on_error;
}
}
if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE) {
if (stlink_enter_swd_mode(sl)) {
printf("Failed to enter SWD mode\n");
goto on_error;
}
}
if (stlink_jtag_reset(sl, 2)) {
printf("Failed to reset JTAG\n");
goto on_error;
}
if (stlink_reset(sl)) {
printf("Failed to reset device\n");
goto on_error;
}
// Core must be halted to use RAM based flashloaders
if (stlink_force_debug(sl)) {
printf("Failed to halt the core\n");
goto on_error;
}
if (stlink_status(sl)) {
printf("Failed to get Core's status\n");
goto on_error;
}
size_t size = 0;
if ((FLASH_ADDRESS > sl->flash_base + sl->flash_size)) {
printf("Unknown memory region\n");
goto on_error;
}
err = stlink_write_flash(sl, FLASH_ADDRESS, (uint8_t *) data, len, 0);
stlink_fwrite_finalize(sl, FLASH_ADDRESS);
if (err == -1) {
printf("stlink_fwrite_flash() == -1\n");
goto on_error;
}
stlink_jtag_reset(sl, 2);
stlink_reset(sl);
err = 0;
on_error:
stlink_exit_debug_mode(sl);
stlink_close(sl);
return err;
}
#include "stlink.h"
#include <stdio.h>
#include <string.h>
#include <unistd.h>
static const uint8_t loader_code_stm32f7[] = {
0x08, 0x4b, 0x72, 0xb1, 0x04, 0x68, 0x0c, 0x60,
0xbf, 0xf3, 0x4f, 0x8f, // DSB Memory barrier for in order flash write
0xdc, 0x89, 0x14, 0xf0, 0x01, 0x0f, 0xfb, 0xd1,
0x00, 0xf1, 0x04, 0x00, 0x01, 0xf1, 0x04, 0x01,
0xa2, 0xf1, 0x01, 0x02, 0xef, 0xe7, 0x00, 0xbe, // bkpt #0x00
0x00, 0x3c, 0x02, 0x40,
};
#define WAIT_ROUNDS 10000
int stlink_flash_loader_init(stlink_t *sl, flash_loader_t *fl) {
size_t size;
/* allocate the loader in sram */
if (stlink_flash_loader_write_to_sram(sl, &fl->loader_addr, &size) == -1) {
printf("Failed to write flash loader to sram!\n");
return -1;
}
/* allocate a one page buffer in sram right after loader */
fl->buf_addr = fl->loader_addr + (uint32_t) size;
return 0;
}
int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t *addr,
size_t *size) {
memcpy(sl->q_buf, loader_code_stm32f7, sizeof(loader_code_stm32f7));
stlink_write_mem32(sl, sl->sram_base, sizeof(loader_code_stm32f7));
*addr = sl->sram_base;
*size = sizeof(loader_code_stm32f7);
/* success */
return 0;
}
int stlink_flash_loader_run(stlink_t *sl, flash_loader_t *fl,
stm32_addr_t target, const uint8_t *buf,
size_t size) {
struct stlink_reg rr;
int i = 0;
size_t count = 0;
// FIXME This can never return -1
if (write_buffer_to_sram(sl, fl, buf, size) == -1) {
// IMPOSSIBLE!
printf("write_buffer_to_sram() == -1\n");
return -1;
}
count = size / sizeof(uint32_t);
if (size % sizeof(uint32_t)) ++count;
/* setup core */
stlink_write_reg(sl, fl->buf_addr, 0); /* source */
stlink_write_reg(sl, target, 1); /* target */
stlink_write_reg(sl, (uint32_t) count, 2); /* count */
stlink_write_reg(
sl, 0,
3); /* flash bank 0 (input), only used on F0, but armless fopr others */
stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */
/* run loader */
stlink_run(sl);
/* wait until done (reaches breakpoint) */
for (i = 0; i < WAIT_ROUNDS; i++) {
usleep(10);
if (stlink_is_core_halted(sl)) break;
}
if (i >= WAIT_ROUNDS) {
printf("flash loader run error\n");
return -1;
}
/* check written byte count */
stlink_read_reg(sl, 2, &rr);
if (rr.r[2] != 0) {
printf("write error, count == %u\n", rr.r[2]);
return -1;
}
return 0;
}
/*
* File: stlink.h
*
* This should contain all the common top level stlink interfaces, regardless
* of how the backend does the work....
*/
#ifndef STLINK_FLASH_LOADER_H_
#define STLINK_FLASH_LOADER_H_
#include <stdint.h>
#include <stddef.h>
#include "stlink.h"
#ifdef __cplusplus
extern "C" {
#endif
int stlink_flash_loader_init(stlink_t *sl, flash_loader_t *fl);
int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t *addr,
size_t *size);
int stlink_flash_loader_run(stlink_t *sl, flash_loader_t *fl,
stm32_addr_t target, const uint8_t *buf,
size_t size);
#ifdef __cplusplus
}
#endif
#endif /* STLINK_FLASH_LOADER_H_ */
// +build linux
package stm32
// #cgo CFLAGS: -I/usr/include/libusb-1.0/
// #cgo LDFLAGS: -lusb-1.0
// #include "stm32_flash.h"
import "C"
import (
"time"
"unsafe"
"cesanta.com/common/go/fwbundle"
"github.com/cesanta/errors"
)
type FlashOpts struct {
ShareName string
Timeout time.Duration
}
func Flash(fw *fwbundle.FirmwareBundle, opts *FlashOpts) error {
data, err := fw.GetPartData("boot")
if err != nil {
return errors.Annotatef(err, "invalid manifest")
}
flash_res := C.stm32_flash(C.CString(opts.ShareName),
unsafe.Pointer(&data[0]),
C.int(len(data)))
if flash_res != 0 {
return errors.Errorf("flash failed")
}
return nil
}
/*
* File: stlink.h
*
* This should contain all the common top level stlink interfaces, regardless
* of how the backend does the work....
*/
#ifndef STLINK_H
#define STLINK_H
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define STLINK_ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
// Max data transfer size.
// 6kB = max mem32_read block, 8kB sram
//#define Q_BUF_LEN 96
#define Q_BUF_LEN (1024 * 100)
// STLINK_DEBUG_RESETSYS, etc:
#define STLINK_CORE_RUNNING 0x80
#define STLINK_CORE_HALTED 0x81
#define STLINK_CORE_STAT_UNKNOWN -1
#define STLINK_GET_VERSION 0xf1
#define STLINK_GET_CURRENT_MODE 0xf5
#define STLINK_GET_TARGET_VOLTAGE 0xF7
#define STLINK_DEBUG_COMMAND 0xF2
#define STLINK_DFU_COMMAND 0xF3
#define STLINK_DFU_EXIT 0x07
// STLINK_GET_CURRENT_MODE
#define STLINK_DEV_DFU_MODE 0x00
#define STLINK_DEV_MASS_MODE 0x01
#define STLINK_DEV_DEBUG_MODE 0x02
#define STLINK_DEV_UNKNOWN_MODE -1
// TODO - possible poor names...
#define STLINK_SWD_ENTER 0x30
#define STLINK_SWD_READCOREID 0x32 // TBD
#define STLINK_JTAG_WRITEDEBUG_32BIT 0x35
#define STLINK_JTAG_READDEBUG_32BIT 0x36
#define STLINK_JTAG_DRIVE_NRST 0x3c
#define STLINK_DEBUG_APIV2_SWD_SET_FREQ 0x43
/* cortex core ids */
// TODO clean this up...
#define STM32VL_CORE_ID 0x1ba01477
#define STM32F7_CORE_ID 0x5ba02477
// Constant STM32 memory map figures
#define STM32_FLASH_BASE 0x08000000
#define STM32_SRAM_BASE 0x20000000
// Baud rate divisors for SWDCLK
#define STLINK_SWDCLK_4MHZ_DIVISOR 0
#define STLINK_SWDCLK_1P8MHZ_DIVISOR 1
#define STLINK_SWDCLK_1P2MHZ_DIVISOR 2
#define STLINK_SWDCLK_950KHZ_DIVISOR 3
#define STLINK_SWDCLK_480KHZ_DIVISOR 7
#define STLINK_SWDCLK_240KHZ_DIVISOR 15
#define STLINK_SWDCLK_125KHZ_DIVISOR 31
#define STLINK_SWDCLK_100KHZ_DIVISOR 40
#define STLINK_SWDCLK_50KHZ_DIVISOR 79
#define STLINK_SWDCLK_25KHZ_DIVISOR 158
#define STLINK_SWDCLK_15KHZ_DIVISOR 265
#define STLINK_SWDCLK_5KHZ_DIVISOR 798
#define STLINK_CHIPID_STM32_F7 0x449
/* Enough space to hold both a V2 command or a V1 command packaged as generic
* scsi*/
#define C_BUF_LEN 32
struct stlink_reg {
uint32_t r[16];
uint32_t s[32];
uint32_t xpsr;
uint32_t main_sp;
uint32_t process_sp;
uint32_t rw;
uint32_t rw2;
uint8_t control;
uint8_t faultmask;
uint8_t basepri;
uint8_t primask;
uint32_t fpscr;
};
typedef uint32_t stm32_addr_t;
typedef struct flash_loader {
stm32_addr_t loader_addr; /* loader sram adddr */
stm32_addr_t buf_addr; /* buffer sram address */
} flash_loader_t;
typedef struct stlink_version_ {
uint32_t stlink_v;
uint32_t jtag_v;
uint32_t swim_v;
uint32_t st_vid;
uint32_t stlink_pid;
} stlink_version_t;
typedef struct _stlink stlink_t;
struct _stlink {
void *backend_data;
// Room for the command header
unsigned char c_buf[C_BUF_LEN];
// Data transferred from or to device
unsigned char q_buf[Q_BUF_LEN];
int q_len;
// transport layer verboseness: 0 for no debug info, 10 for lots
uint32_t core_id;
uint32_t chip_id;
int core_stat;
char serial[16];
int serial_size;
stm32_addr_t flash_base;
size_t flash_size;
size_t flash_pgsz;
/* sram settings */
stm32_addr_t sram_base;
size_t sram_size;
// bootloader
stm32_addr_t sys_base;
size_t sys_size;
struct stlink_version_ version;
};
int stlink_enter_swd_mode(stlink_t *sl);
int stlink_enter_jtag_mode(stlink_t *sl);
int stlink_exit_debug_mode(stlink_t *sl);
int stlink_exit_dfu_mode(stlink_t *sl);
void stlink_close(stlink_t *sl);
int stlink_core_id(stlink_t *sl);
int stlink_reset(stlink_t *sl);
int stlink_jtag_reset(stlink_t *sl, int value);
int stlink_run(stlink_t *sl);
int stlink_status(stlink_t *sl);
int stlink_version(stlink_t *sl);
int stlink_read_debug32(stlink_t *sl, uint32_t addr, uint32_t *data);
int stlink_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len);
int stlink_write_debug32(stlink_t *sl, uint32_t addr, uint32_t data);
int stlink_write_mem32(stlink_t *sl, uint32_t addr, uint16_t len);
int stlink_write_mem8(stlink_t *sl, uint32_t addr, uint16_t len);
int stlink_read_all_regs(stlink_t *sl, struct stlink_reg *regp);
int stlink_read_reg(stlink_t *sl, int r_idx, struct stlink_reg *regp);
int stlink_write_reg(stlink_t *sl, uint32_t reg, int idx);
int stlink_step(stlink_t *sl);
int stlink_current_mode(stlink_t *sl);
int stlink_force_debug(stlink_t *sl);
int stlink_target_voltage(stlink_t *sl);
int stlink_set_swdclk(stlink_t *sl, uint16_t divisor);
int stlink_write_flash(stlink_t *sl, stm32_addr_t address, uint8_t *data,
uint32_t length, uint8_t eraseonly);
int stlink_fwrite_flash(stlink_t *sl, const char *path, stm32_addr_t addr);
int stlink_verify_write_flash(stlink_t *sl, stm32_addr_t address, uint8_t *data,
uint32_t length);
int stlink_chip_id(stlink_t *sl, uint32_t *chip_id);
int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr);
uint32_t stlink_calculate_pagesize(stlink_t *sl, uint32_t flashaddr);
uint16_t read_uint16(const unsigned char *c, const int pt);
void stlink_core_stat(stlink_t *sl);
unsigned int is_bigendian(void);
uint32_t read_uint32(const unsigned char *c, const int pt);
void write_uint32(unsigned char *buf, uint32_t ui);
void write_uint16(unsigned char *buf, uint16_t ui);
bool stlink_is_core_halted(stlink_t *sl);
int write_buffer_to_sram(stlink_t *sl, flash_loader_t *fl, const uint8_t *buf,
size_t size);
int write_loader_to_sram(stlink_t *sl, stm32_addr_t *addr, size_t *size);
int stlink_load_device_params(stlink_t *sl);
void stlink_fwrite_finalize(stlink_t *sl, stm32_addr_t addr);
#include "usb.h"
#include "flash_loader.h"
#ifdef __cplusplus
}
#endif
#endif /* STLINK_H */
#ifndef STM32_FLASH_H_
#define STM32_FLASH_H_
int stm32_flash(const char *device_name, void *data, int len);
#endif
This diff is collapsed.
/*
* File: stlink/usb.h
* Author: karl
*
* Created on October 1, 2011, 11:29 PM
*/
#ifndef STLINK_USB_H
#define STLINK_USB_H
#include <stdbool.h>
#include <libusb.h>
#include "stlink.h"
#ifdef __cplusplus
extern "C" {
#endif
#define STLINK_USB_VID_ST 0x0483
#define STLINK_USB_PID_STLINK 0x3744
#define STLINK_USB_PID_STLINK_32L 0x3748
#define STLINK_USB_PID_STLINK_NUCLEO 0x374b
#define STLINK_SG_SIZE 31
#define STLINK_CMD_SIZE 16
struct stlink_libusb {
libusb_context *libusb_ctx;
libusb_device_handle *usb_handle;
unsigned int ep_req;
unsigned int ep_rep;
int protocoll;
unsigned int sg_transfer_idx;
unsigned int cmd_len;
};
/**
* Open a stlink
* @param verbose Verbosity loglevel
* @param reset Reset stlink programmer
* @param serial Serial number to search for, when NULL the first stlink found
* is opened (binary format)
* @retval NULL Error while opening the stlink
* @retval !NULL Stlink found and ready to use
*/
stlink_t *stlink_open_usb(bool reset, char serial[16]);
void _stlink_usb_close(stlink_t *sl);
int _stlink_usb_version(stlink_t *sl);
int32_t _stlink_usb_target_voltage(stlink_t *sl);
int _stlink_usb_read_debug32(stlink_t *sl, uint32_t addr, uint32_t *data);
int _stlink_usb_write_debug32(stlink_t *sl, uint32_t addr, uint32_t data);
int _stlink_usb_write_mem32(stlink_t *sl, uint32_t addr, uint16_t len);
int _stlink_usb_write_mem8(stlink_t *sl, uint32_t addr, uint16_t len);
int _stlink_usb_current_mode(stlink_t *sl);
int _stlink_usb_core_id(stlink_t *sl);
int _stlink_usb_status(stlink_t *sl);
int _stlink_usb_force_debug(stlink_t *sl);
int _stlink_usb_enter_swd_mode(stlink_t *sl);
int _stlink_usb_exit_dfu_mode(stlink_t *sl);
int _stlink_usb_reset(stlink_t *sl);
int _stlink_usb_jtag_reset(stlink_t *sl, int value);
int _stlink_usb_step(stlink_t *sl);
int _stlink_usb_run(stlink_t *sl);
int _stlink_usb_set_swdclk(stlink_t *sl, uint16_t clk_divisor);
int _stlink_usb_exit_debug_mode(stlink_t *sl);
int _stlink_usb_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len);
int _stlink_usb_read_reg(stlink_t *sl, int r_idx, struct stlink_reg *regp);
int _stlink_usb_write_reg(stlink_t *sl, uint32_t reg, int idx);
#ifdef __cplusplus
}
#endif
#endif /* STLINK_USB_H */
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