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  1. 19 Jul, 2016 2 commits
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  21. 28 Jun, 2016 1 commit
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  29. 16 Jun, 2016 1 commit
  31. 14 Jun, 2016 1 commit
    • Frank Barchard's avatar
      android_full_debug x86 fix - use +rm for width count · fd3e676e
      Frank Barchard authored 
      Work around for android full debug build runnign out of registers.
5 functions were running out of registers causing the compiler error
error: 'asm' operand has impossible constraints
These functions mostly have 4 pointers, a counter (width) and a tempory
eax register.  With fpic and debug using stackframes, 2 registers are
unavailable.  So a total of 8 registers are used.
Although fpic and stack frame dont apply to assembly, the compiler
reserves 2 registers.  The optimized version builds, so its likely
freeing up the registers once it knows they are not used.
These functions used to build, so compile options and/or compiler may
have updated.. likely fpic was turned on.
An attribute can be done to disable each, and will avoid using the
2 GPR registers, but they are still reserved and unavailable in debug
builds on current compilers (gcc 4.9 and clang 3.8).

R=dhrosa@google.com
BUG=libyuv:602

Review URL: https://codereview.chromium.org/2066933002 .
      fd3e676e
  33. 08 Jun, 2016 2 commits
    • Frank Barchard's avatar
      document cpuid command line behavior · e2611a73
      Frank Barchard authored 
      cpu_info_ is zero for uninitialized state and all bits are off, disabling all cpu optimizations.
the 1 bit indicates cpu_info_ is initialized avoiding calling the detection code again for performance.

MaskCpuFlags initializes the cpu ignoring existing flags, then masks with the supplied flags and stores to cpu_info_.
As a mask, -1 has no effect, enabling all cpu features that were detected, but nothing that wasnt detected.
Setting to 0 will cause the next call to re-initialize the cpu, which is same as enabling all features.
Setting mask to 1 will turn off all cpu features but keep the initialized bit on, so the next detection call wont reinitialize and the cpu features are all disabled.

So normal behavior for command line and programatic masking is:
1 = C
-1 = SIMD

TBR=harryjin@google.com
BUG=libyuv:600
TESTED=out64/Release/bin/run_libyuv_unittest -s libyuv_unittest --verbose --release --gtest_filter=*ARGBExtractAlpha* -a "--libyuv_width=1280 --libyuv_height=720 --libyuv_repeat=9999 --libyuv_flags=1 --libyuv_cpu_info=1"

Review URL: https://codereview.chromium.org/2042933002 .
      e2611a73
    • Frank Barchard's avatar
      neon64 use width int directly. · 026be3cd
      Frank Barchard authored 
      width %w size modifier the int width can be passed directly to arm assembly.
For functions that take input constants, the outputs are declared as early
write using &, meaning the outputs use used before all inputs are consumed.

R=harryjin@google.com
BUG=libyuv:598

Review URL: https://codereview.chromium.org/2043073003 .
      026be3cd
  35. 07 Jun, 2016 2 commits
    • Frank Barchard's avatar
      Remove ifdefs for neon in row_neon*.cc · 17e8a4d3
      Frank Barchard authored 
      ifdefs on a function level are not needed for neon functions, unless
they are conditionally enabled in row.h.  No functions are conditionally
enabled at this time, so all ifdefs can be removed from row_neon.cc and
row_neon64.cc

TBR=kjellander@chromium.org
BUG=libyuv:599

Review URL: https://codereview.chromium.org/2044223002 .
      17e8a4d3
    • Frank Barchard's avatar
      ARGBExtractAlpha 16 pixels at a time for ARM · 65460962
      Frank Barchard authored 
      arm64   8     TestARGBExtractAlpha (10019 ms) <-original 64 bit code
arm64   8 x2  TestARGBExtractAlpha (7639 ms)
arm64   16    TestARGBExtractAlpha (7369 ms) <- new 64 bit code
thumb32 8     TestARGBExtractAlpha (9505 ms) <- original 32 bit code
thumb32 8 x2  TestARGBExtractAlpha (7400 ms)
thumb32 8 x2i TestARGBExtractAlpha (7266 ms) <- new 32 bit code
arm32   8     TestARGBExtractAlpha (10002 ms)

BUG=libyuv:572
TESTED=local test on nexus 9
R=harryjin@google.com, wangcheng@google.com

Review URL: https://codereview.chromium.org/2035573002 .
      65460962
  37. 01 Jun, 2016 1 commit
  39. 28 May, 2016 1 commit
  41. 27 May, 2016 1 commit
  43. 26 May, 2016 1 commit
  45. 24 May, 2016 5 commits
  47. 23 May, 2016 1 commit