- 13 Jan, 2017 1 commit
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Manojkumar Bhosale authored
R=fbarchard@google.com BUG=libyuv:634 Performance Gain (vs C vectorized) TransposeWx16_MSA - ~6.0x TransposeWx16_Any_MSA - ~4.7x TransposeUVWx16_MSA - ~6.3x TransposeUVWx16_Any_MSA - ~5.4x Performance Gain (vs C non-vectorized) TransposeWx16_MSA - ~6.0x TransposeWx16_Any_MSA - ~4.8x TransposeUVWx16_MSA - ~6.3x TransposeUVWx16_Any_MSA - ~5.4x Review-Url: https://codereview.chromium.org/2617703002 .
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- 15 Dec, 2016 1 commit
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Manojkumar Bhosale authored
R=fbarchard@google.com BUG=libyuv:634 Performance Gain (vs C vectorized) TransposeWx8_MSA - ~2.7x TransposeWx8_Any_MSA - ~2.1x TransposeUVWx8_MSA - ~2.5x TransposeUVWx8_Any_MSA - ~2.7x Performance Gain (vs C non-vectorized) TransposeWx8_MSA - ~4.6x TransposeWx8_Any_MSA - ~2.9x TransposeUVWx8_MSA - ~4.4x TransposeUVWx8_Any_MSA - ~3.7x Review URL: https://codereview.chromium.org/2553403002 .
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- 08 Nov, 2016 1 commit
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Frank Barchard authored
BUG=libyuv:654 R=kjellander@chromium.org Review URL: https://codereview.chromium.org/2469353005 .
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- 05 Feb, 2016 1 commit
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Frank Barchard authored
When attempting to normalize function names to end in Row_SIMD it was made harder with MIPS_DSPR2 naming convention. Other CPUs do not include the vendor. This should be named consistently. Removed the DISABLE_MIPS in favour of DISABLE_ASM for consistency with other processors. TBR=harryjin@google.com BUG=libyuv:562 Review URL: https://codereview.chromium.org/1677633002 .
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- 08 Aug, 2015 1 commit
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Frank Barchard authored
BUG=libyuv:464 R=harryjin@google.com Review URL: https://webrtc-codereview.appspot.com/55709004.
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- 28 Jul, 2015 1 commit
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Frank Barchard authored
BUG=libyuv:477 R=harryjin@google.com Review URL: https://webrtc-codereview.appspot.com/52199004.
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- 27 Jul, 2015 1 commit
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Frank Barchard authored
rotate any R=harryjin@google.com BUG=libyuv:464 Review URL: https://webrtc-codereview.appspot.com/53769004.
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