vqrdmulh takes 3 parameters and clang requires all 3 to be specified, not just 2.

BUG=72
TEST=none
Review URL: https://webrtc-codereview.appspot.com/744006

git-svn-id: http://libyuv.googlecode.com/svn/trunk@325 16f28f9a-4ce2-e073-06de-1de4eb20be90

README.chromium

 Name: libyuv
 URL: http://code.google.com/p/libyuv/
-Version: 324
+Version: 325
 License: BSD
 License File: LICENSE
 

include/libyuv/planar_functions.h

@@ -164,6 +164,7 @@ typedef void (*ARGBBlendRow)(const uint8* src_argb0, const uint8* src_argb1,
 ARGBBlendRow GetARGBBlend();
 
 // Alpha Blend ARGB images and store to destination.
+// Alpha of destination is set to 255.
 int ARGBBlend(const uint8* src_argb0, int src_stride_argb0,
               const uint8* src_argb1, int src_stride_argb1,
               uint8* dst_argb, int dst_stride_argb,

include/libyuv/version.h

@@ -11,6 +11,6 @@
 #ifndef INCLUDE_LIBYUV_VERSION_H_  // NOLINT
 #define INCLUDE_LIBYUV_VERSION_H_
 
-#define LIBYUV_VERSION 324
+#define LIBYUV_VERSION 325
 
 #endif  // INCLUDE_LIBYUV_VERSION_H_  NOLINT

source/scale.cc

@@ -357,7 +357,7 @@ static void OMITFP ScaleRowDown38_3_Int_NEON(const uint8* src_ptr,
     // dst_ptr[3] = (s[6 + st * 0] + s[7 + st * 0]
     //             + s[6 + st * 1] + s[7 + st * 1]
     //             + s[6 + st * 2] + s[7 + st * 2]) / 6
-    "vqrdmulh.s16 q2, q13                      \n"
+    "vqrdmulh.s16 q2, q2, q13                  \n"
     "vmovn.u16    d4, q2                       \n"
 
     // Shuffle 2,3 reg around so that 2 can be added to the
@@ -388,7 +388,7 @@ static void OMITFP ScaleRowDown38_3_Int_NEON(const uint8* src_ptr,
     // Need to divide, but can't downshift as the the value
     //  isn't a power of 2.  So multiply by 65536 / n
     //  and take the upper 16 bits.
-    "vqrdmulh.s16 q0, q15                      \n"
+    "vqrdmulh.s16 q0, q0, q15                  \n"
 
     // Align for table lookup, vtbl requires registers to
     //  be adjacent
@@ -484,7 +484,7 @@ static void ScaleRowDown38_2_Int_NEON(const uint8* src_ptr,
     // Need to divide, but can't downshift as the the value
     //  isn't a power of 2.  So multiply by 65536 / n
     //  and take the upper 16 bits.
-    "vqrdmulh.s16 q0, q13                      \n"
+    "vqrdmulh.s16 q0, q0, q13                  \n"
 
     // Align for table lookup, vtbl requires registers to
     //  be adjacent