Commit 8b55212c authored by fbarchard@google.com's avatar fbarchard@google.com

Make vextop take the register selector parameter to access the upper portion of the avx registers.

BUG=269
TESTED=nacl
R=harryjin@google.com

Review URL: https://webrtc-codereview.appspot.com/37399004

git-svn-id: http://libyuv.googlecode.com/svn/trunk@1205 16f28f9a-4ce2-e073-06de-1de4eb20be90
parent d3bc0103
Name: libyuv
URL: http://code.google.com/p/libyuv/
Version: 1203
Version: 1205
License: BSD
License File: LICENSE
......
......@@ -440,10 +440,10 @@ typedef uint8 ulvec8[32];
"lea " #offset "(%q" #base ",%q" #index "," #scale "),%%r14d\n" \
#opcode " (%%r15,%%r14),%%" #reg1 ",%%" #reg2 "\n" \
BUNDLEUNLOCK
#define VEXTOPMEM(opcode, reg, offset, base, index, scale) \
#define VEXTOPMEM(op, sel, reg, offset, base, index, scale) \
BUNDLELOCK \
"lea " #offset "(%q" #base ",%q" #index "," #scale "),%%r14d\n" \
#opcode " $0x0,%%" #reg ",(%%r15,%%r14)\n" \
#op " $" #sel ",%%" #reg ",(%%r15,%%r14)\n" \
BUNDLEUNLOCK
#else // defined(__native_client__) && defined(__x86_64__)
#define BUNDLEALIGN
......@@ -465,8 +465,8 @@ typedef uint8 ulvec8[32];
#define VMEMOPREG(opcode, offset, base, index, scale, reg1, reg2) \
#opcode " " #offset "(%" #base ",%" #index "," #scale "),%%" #reg1 ",%%" \
#reg2 "\n"
#define VEXTOPMEM(opcode, reg, offset, base, index, scale) \
#opcode " $0x0,%%" #reg ","#offset "(%" #base ",%" #index "," #scale ")\n"
#define VEXTOPMEM(op, sel, reg, offset, base, index, scale) \
#op " $" #sel ",%%" #reg ","#offset "(%" #base ",%" #index "," #scale ")\n"
#endif // defined(__native_client__) && defined(__x86_64__)
#if defined(__arm__) || defined(__aarch64__)
......
......@@ -11,6 +11,6 @@
#ifndef INCLUDE_LIBYUV_VERSION_H_ // NOLINT
#define INCLUDE_LIBYUV_VERSION_H_
#define LIBYUV_VERSION 1203
#define LIBYUV_VERSION 1205
#endif // INCLUDE_LIBYUV_VERSION_H_ NOLINT
......@@ -998,7 +998,7 @@ void ARGBToUVRow_AVX2(const uint8* src_argb0, int src_stride_argb,
"vpaddb %%ymm5,%%ymm0,%%ymm0 \n"
"vextractf128 $0x0,%%ymm0," MEMACCESS(1) " \n"
VEXTOPMEM(vextractf128,ymm0,0x1,1,2,1) // vextractf128 $0x1,%%ymm0,(%1,%2,1)
VEXTOPMEM(vextractf128,1,ymm0,0x0,1,2,1) // vextractf128 1,%%ymm0,(%1,%2,1)
"lea " MEMLEA(0x10,1) ",%1 \n"
"sub $0x20,%3 \n"
"jg 1b \n"
......@@ -3345,7 +3345,7 @@ void YUY2ToUVRow_AVX2(const uint8* src_yuy2, int stride_yuy2,
"vpermq $0xd8,%%ymm1,%%ymm1 \n"
"vpermq $0xd8,%%ymm0,%%ymm0 \n"
"vextractf128 $0x0,%%ymm1," MEMACCESS(1) " \n"
VEXTOPMEM(vextractf128,ymm0,0x00,1,2,1) // vextractf128 $0x0,%%ymm0,(%1,%2,1)
VEXTOPMEM(vextractf128,0,ymm0,0x00,1,2,1) // vextractf128 $0x0,%%ymm0,(%1,%2,1)
"lea " MEMLEA(0x10,1) ",%1 \n"
"sub $0x20,%3 \n"
"jg 1b \n"
......@@ -3387,7 +3387,7 @@ void YUY2ToUV422Row_AVX2(const uint8* src_yuy2,
"vpermq $0xd8,%%ymm1,%%ymm1 \n"
"vpermq $0xd8,%%ymm0,%%ymm0 \n"
"vextractf128 $0x0,%%ymm1," MEMACCESS(1) " \n"
VEXTOPMEM(vextractf128,ymm0,0x00,1,2,1) // vextractf128 $0x0,%%ymm0,(%1,%2,1)
VEXTOPMEM(vextractf128,0,ymm0,0x00,1,2,1) // vextractf128 $0x0,%%ymm0,(%1,%2,1)
"lea " MEMLEA(0x10,1) ",%1 \n"
"sub $0x20,%3 \n"
"jg 1b \n"
......@@ -3458,7 +3458,7 @@ void UYVYToUVRow_AVX2(const uint8* src_uyvy, int stride_uyvy,
"vpermq $0xd8,%%ymm1,%%ymm1 \n"
"vpermq $0xd8,%%ymm0,%%ymm0 \n"
"vextractf128 $0x0,%%ymm1," MEMACCESS(1) " \n"
VEXTOPMEM(vextractf128,ymm0,0x00,1,2,1) // vextractf128 $0x0,%%ymm0,(%1,%2,1)
VEXTOPMEM(vextractf128,0,ymm0,0x00,1,2,1) // vextractf128 $0x0,%%ymm0,(%1,%2,1)
"lea " MEMLEA(0x10,1) ",%1 \n"
"sub $0x20,%3 \n"
"jg 1b \n"
......@@ -3500,7 +3500,7 @@ void UYVYToUV422Row_AVX2(const uint8* src_uyvy,
"vpermq $0xd8,%%ymm1,%%ymm1 \n"
"vpermq $0xd8,%%ymm0,%%ymm0 \n"
"vextractf128 $0x0,%%ymm1," MEMACCESS(1) " \n"
VEXTOPMEM(vextractf128,ymm0,0x00,1,2,1) // vextractf128 $0x0,%%ymm0,(%1,%2,1)
VEXTOPMEM(vextractf128,0,ymm0,0x00,1,2,1) // vextractf128 $0x0,%%ymm0,(%1,%2,1)
"lea " MEMLEA(0x10,1) ",%1 \n"
"sub $0x20,%3 \n"
"jg 1b \n"
......
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