Commit 0d880e5b authored by Frank Barchard's avatar Frank Barchard

rename MIPS_DSPR2 to DSPR2 for consistency

When attempting to normalize function names to end in Row_SIMD it was made
harder with MIPS_DSPR2 naming convention.
Other CPUs do not include the vendor.  This should be named consistently.

Removed the DISABLE_MIPS in favour of DISABLE_ASM for consistency with other
processors.

TBR=harryjin@google.com
BUG=libyuv:562

Review URL: https://codereview.chromium.org/1677633002 .
parent af90e821
Name: libyuv Name: libyuv
URL: http://code.google.com/p/libyuv/ URL: http://code.google.com/p/libyuv/
Version: 1571 Version: 1572
License: BSD License: BSD
License File: LICENSE License File: LICENSE
......
...@@ -41,7 +41,7 @@ static const int kCpuHasAVX3 = 0x2000; ...@@ -41,7 +41,7 @@ static const int kCpuHasAVX3 = 0x2000;
// These flags are only valid on MIPS processors. // These flags are only valid on MIPS processors.
static const int kCpuHasMIPS = 0x10000; static const int kCpuHasMIPS = 0x10000;
static const int kCpuHasMIPS_DSPR2 = 0x20000; static const int kCpuHasDSPR2 = 0x20000;
// Internal function used to auto-init. // Internal function used to auto-init.
LIBYUV_API LIBYUV_API
......
...@@ -51,8 +51,8 @@ extern "C" { ...@@ -51,8 +51,8 @@ extern "C" {
#if !defined(LIBYUV_DISABLE_MIPS) && !defined(__native_client__) && \ #if !defined(LIBYUV_DISABLE_MIPS) && !defined(__native_client__) && \
defined(__mips__) && \ defined(__mips__) && \
defined(__mips_dsp) && (__mips_dsp_rev >= 2) defined(__mips_dsp) && (__mips_dsp_rev >= 2)
#define HAS_TRANSPOSEWX8_MIPS_DSPR2 #define HAS_TRANSPOSEWX8_DSPR2
#define HAS_TRANSPOSEUVWX8_MIPS_DSPR2 #define HAS_TRANSPOSEUVWX8_DSPR2
#endif // defined(__mips__) #endif // defined(__mips__)
void TransposeWxH_C(const uint8* src, int src_stride, void TransposeWxH_C(const uint8* src, int src_stride,
...@@ -66,10 +66,10 @@ void TransposeWx8_SSSE3(const uint8* src, int src_stride, ...@@ -66,10 +66,10 @@ void TransposeWx8_SSSE3(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width); uint8* dst, int dst_stride, int width);
void TransposeWx8_Fast_SSSE3(const uint8* src, int src_stride, void TransposeWx8_Fast_SSSE3(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width); uint8* dst, int dst_stride, int width);
void TransposeWx8_MIPS_DSPR2(const uint8* src, int src_stride, void TransposeWx8_DSPR2(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width);
void TransposeWx8_Fast_DSPR2(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width); uint8* dst, int dst_stride, int width);
void TransposeWx8_Fast_MIPS_DSPR2(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width);
void TransposeWx8_Any_NEON(const uint8* src, int src_stride, void TransposeWx8_Any_NEON(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width); uint8* dst, int dst_stride, int width);
...@@ -77,8 +77,8 @@ void TransposeWx8_Any_SSSE3(const uint8* src, int src_stride, ...@@ -77,8 +77,8 @@ void TransposeWx8_Any_SSSE3(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width); uint8* dst, int dst_stride, int width);
void TransposeWx8_Fast_Any_SSSE3(const uint8* src, int src_stride, void TransposeWx8_Fast_Any_SSSE3(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width); uint8* dst, int dst_stride, int width);
void TransposeWx8_Any_MIPS_DSPR2(const uint8* src, int src_stride, void TransposeWx8_Any_DSPR2(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width); uint8* dst, int dst_stride, int width);
void TransposeUVWxH_C(const uint8* src, int src_stride, void TransposeUVWxH_C(const uint8* src, int src_stride,
uint8* dst_a, int dst_stride_a, uint8* dst_a, int dst_stride_a,
...@@ -94,9 +94,9 @@ void TransposeUVWx8_SSE2(const uint8* src, int src_stride, ...@@ -94,9 +94,9 @@ void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
void TransposeUVWx8_NEON(const uint8* src, int src_stride, void TransposeUVWx8_NEON(const uint8* src, int src_stride,
uint8* dst_a, int dst_stride_a, uint8* dst_a, int dst_stride_a,
uint8* dst_b, int dst_stride_b, int width); uint8* dst_b, int dst_stride_b, int width);
void TransposeUVWx8_MIPS_DSPR2(const uint8* src, int src_stride, void TransposeUVWx8_DSPR2(const uint8* src, int src_stride,
uint8* dst_a, int dst_stride_a, uint8* dst_a, int dst_stride_a,
uint8* dst_b, int dst_stride_b, int width); uint8* dst_b, int dst_stride_b, int width);
void TransposeUVWx8_Any_SSE2(const uint8* src, int src_stride, void TransposeUVWx8_Any_SSE2(const uint8* src, int src_stride,
uint8* dst_a, int dst_stride_a, uint8* dst_a, int dst_stride_a,
...@@ -104,9 +104,9 @@ void TransposeUVWx8_Any_SSE2(const uint8* src, int src_stride, ...@@ -104,9 +104,9 @@ void TransposeUVWx8_Any_SSE2(const uint8* src, int src_stride,
void TransposeUVWx8_Any_NEON(const uint8* src, int src_stride, void TransposeUVWx8_Any_NEON(const uint8* src, int src_stride,
uint8* dst_a, int dst_stride_a, uint8* dst_a, int dst_stride_a,
uint8* dst_b, int dst_stride_b, int width); uint8* dst_b, int dst_stride_b, int width);
void TransposeUVWx8_Any_MIPS_DSPR2(const uint8* src, int src_stride, void TransposeUVWx8_Any_DSPR2(const uint8* src, int src_stride,
uint8* dst_a, int dst_stride_a, uint8* dst_a, int dst_stride_a,
uint8* dst_b, int dst_stride_b, int width); uint8* dst_b, int dst_stride_b, int width);
#ifdef __cplusplus #ifdef __cplusplus
} // extern "C" } // extern "C"
......
...@@ -174,7 +174,7 @@ extern "C" { ...@@ -174,7 +174,7 @@ extern "C" {
// The following functions fail on gcc/clang 32 bit with fpic and framepointer. // The following functions fail on gcc/clang 32 bit with fpic and framepointer.
// caveat: clangcl uses row_win.cc which works. // caveat: clangcl uses row_win.cc which works.
#if defined(NDEBUG) || !(defined(_DEBUG) && defined(__i386__)) || \ #if defined(NDEBUG) || !(defined(_DEBUG) && defined(__i386__)) || \
!defined(__i386__) || defined(_MSC_VER) !defined(__i386__) || defined(_MSC_VER)
// TODO(fbarchard): fix build error on x86 debug // TODO(fbarchard): fix build error on x86 debug
// https://code.google.com/p/libyuv/issues/detail?id=524 // https://code.google.com/p/libyuv/issues/detail?id=524
#define HAS_I411TOARGBROW_SSSE3 #define HAS_I411TOARGBROW_SSSE3
...@@ -355,11 +355,11 @@ extern "C" { ...@@ -355,11 +355,11 @@ extern "C" {
(_MIPS_SIM == _MIPS_SIM_ABI32) && (__mips_isa_rev < 6) (_MIPS_SIM == _MIPS_SIM_ABI32) && (__mips_isa_rev < 6)
#define HAS_COPYROW_MIPS #define HAS_COPYROW_MIPS
#if defined(__mips_dsp) && (__mips_dsp_rev >= 2) #if defined(__mips_dsp) && (__mips_dsp_rev >= 2)
#define HAS_I422TOARGBROW_MIPS_DSPR2 #define HAS_I422TOARGBROW_DSPR2
#define HAS_INTERPOLATEROW_MIPS_DSPR2 #define HAS_INTERPOLATEROW_DSPR2
#define HAS_MIRRORROW_MIPS_DSPR2 #define HAS_MIRRORROW_DSPR2
#define HAS_MIRRORUVROW_MIPS_DSPR2 #define HAS_MIRRORUVROW_DSPR2
#define HAS_SPLITUVROW_MIPS_DSPR2 #define HAS_SPLITUVROW_DSPR2
#endif #endif
#endif #endif
...@@ -790,7 +790,7 @@ void ARGBToUV411Row_C(const uint8* src_argb, ...@@ -790,7 +790,7 @@ void ARGBToUV411Row_C(const uint8* src_argb,
void MirrorRow_AVX2(const uint8* src, uint8* dst, int width); void MirrorRow_AVX2(const uint8* src, uint8* dst, int width);
void MirrorRow_SSSE3(const uint8* src, uint8* dst, int width); void MirrorRow_SSSE3(const uint8* src, uint8* dst, int width);
void MirrorRow_NEON(const uint8* src, uint8* dst, int width); void MirrorRow_NEON(const uint8* src, uint8* dst, int width);
void MirrorRow_MIPS_DSPR2(const uint8* src, uint8* dst, int width); void MirrorRow_DSPR2(const uint8* src, uint8* dst, int width);
void MirrorRow_C(const uint8* src, uint8* dst, int width); void MirrorRow_C(const uint8* src, uint8* dst, int width);
void MirrorRow_Any_AVX2(const uint8* src, uint8* dst, int width); void MirrorRow_Any_AVX2(const uint8* src, uint8* dst, int width);
void MirrorRow_Any_SSSE3(const uint8* src, uint8* dst, int width); void MirrorRow_Any_SSSE3(const uint8* src, uint8* dst, int width);
...@@ -801,10 +801,9 @@ void MirrorUVRow_SSSE3(const uint8* src_uv, uint8* dst_u, uint8* dst_v, ...@@ -801,10 +801,9 @@ void MirrorUVRow_SSSE3(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void MirrorUVRow_NEON(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void MirrorUVRow_NEON(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void MirrorUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void MirrorUVRow_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void MirrorUVRow_C(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void MirrorUVRow_C(const uint8* src_uv, uint8* dst_u, uint8* dst_v, int width);
int width);
void ARGBMirrorRow_AVX2(const uint8* src, uint8* dst, int width); void ARGBMirrorRow_AVX2(const uint8* src, uint8* dst, int width);
void ARGBMirrorRow_SSE2(const uint8* src, uint8* dst, int width); void ARGBMirrorRow_SSE2(const uint8* src, uint8* dst, int width);
...@@ -821,16 +820,16 @@ void SplitUVRow_AVX2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, ...@@ -821,16 +820,16 @@ void SplitUVRow_AVX2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void SplitUVRow_NEON(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void SplitUVRow_NEON(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void SplitUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void SplitUVRow_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void SplitUVRow_Any_SSE2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void SplitUVRow_Any_SSE2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void SplitUVRow_Any_AVX2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void SplitUVRow_Any_AVX2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void SplitUVRow_Any_NEON(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void SplitUVRow_Any_NEON(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void SplitUVRow_Any_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void SplitUVRow_Any_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width); int width);
void MergeUVRow_C(const uint8* src_u, const uint8* src_v, uint8* dst_uv, void MergeUVRow_C(const uint8* src_u, const uint8* src_v, uint8* dst_uv,
int width); int width);
...@@ -1610,18 +1609,18 @@ void UYVYToARGBRow_Any_NEON(const uint8* src_uyvy, ...@@ -1610,18 +1609,18 @@ void UYVYToARGBRow_Any_NEON(const uint8* src_uyvy,
uint8* dst_argb, uint8* dst_argb,
const struct YuvConstants* yuvconstants, const struct YuvConstants* yuvconstants,
int width); int width);
void I422ToARGBRow_MIPS_DSPR2(const uint8* src_y, void I422ToARGBRow_DSPR2(const uint8* src_y,
const uint8* src_u, const uint8* src_u,
const uint8* src_v, const uint8* src_v,
uint8* dst_argb, uint8* dst_argb,
const struct YuvConstants* yuvconstants, const struct YuvConstants* yuvconstants,
int width); int width);
void I422ToARGBRow_MIPS_DSPR2(const uint8* src_y, void I422ToARGBRow_DSPR2(const uint8* src_y,
const uint8* src_u, const uint8* src_u,
const uint8* src_v, const uint8* src_v,
uint8* dst_argb, uint8* dst_argb,
const struct YuvConstants* yuvconstants, const struct YuvConstants* yuvconstants,
int width); int width);
void YUY2ToYRow_AVX2(const uint8* src_yuy2, uint8* dst_y, int width); void YUY2ToYRow_AVX2(const uint8* src_yuy2, uint8* dst_y, int width);
void YUY2ToUVRow_AVX2(const uint8* src_yuy2, int stride_yuy2, void YUY2ToUVRow_AVX2(const uint8* src_yuy2, int stride_yuy2,
...@@ -1831,9 +1830,9 @@ void InterpolateRow_AVX2(uint8* dst_ptr, const uint8* src_ptr, ...@@ -1831,9 +1830,9 @@ void InterpolateRow_AVX2(uint8* dst_ptr, const uint8* src_ptr,
void InterpolateRow_NEON(uint8* dst_ptr, const uint8* src_ptr, void InterpolateRow_NEON(uint8* dst_ptr, const uint8* src_ptr,
ptrdiff_t src_stride_ptr, int width, ptrdiff_t src_stride_ptr, int width,
int source_y_fraction); int source_y_fraction);
void InterpolateRow_MIPS_DSPR2(uint8* dst_ptr, const uint8* src_ptr, void InterpolateRow_DSPR2(uint8* dst_ptr, const uint8* src_ptr,
ptrdiff_t src_stride_ptr, int width, ptrdiff_t src_stride_ptr, int width,
int source_y_fraction); int source_y_fraction);
void InterpolateRow_Any_NEON(uint8* dst_ptr, const uint8* src_ptr, void InterpolateRow_Any_NEON(uint8* dst_ptr, const uint8* src_ptr,
ptrdiff_t src_stride_ptr, int width, ptrdiff_t src_stride_ptr, int width,
int source_y_fraction); int source_y_fraction);
...@@ -1843,9 +1842,9 @@ void InterpolateRow_Any_SSSE3(uint8* dst_ptr, const uint8* src_ptr, ...@@ -1843,9 +1842,9 @@ void InterpolateRow_Any_SSSE3(uint8* dst_ptr, const uint8* src_ptr,
void InterpolateRow_Any_AVX2(uint8* dst_ptr, const uint8* src_ptr, void InterpolateRow_Any_AVX2(uint8* dst_ptr, const uint8* src_ptr,
ptrdiff_t src_stride_ptr, int width, ptrdiff_t src_stride_ptr, int width,
int source_y_fraction); int source_y_fraction);
void InterpolateRow_Any_MIPS_DSPR2(uint8* dst_ptr, const uint8* src_ptr, void InterpolateRow_Any_DSPR2(uint8* dst_ptr, const uint8* src_ptr,
ptrdiff_t src_stride_ptr, int width, ptrdiff_t src_stride_ptr, int width,
int source_y_fraction); int source_y_fraction);
void InterpolateRow_16_C(uint16* dst_ptr, const uint16* src_ptr, void InterpolateRow_16_C(uint16* dst_ptr, const uint16* src_ptr,
ptrdiff_t src_stride_ptr, ptrdiff_t src_stride_ptr,
......
...@@ -90,10 +90,10 @@ extern "C" { ...@@ -90,10 +90,10 @@ extern "C" {
// The following are available on Mips platforms: // The following are available on Mips platforms:
#if !defined(LIBYUV_DISABLE_MIPS) && !defined(__native_client__) && \ #if !defined(LIBYUV_DISABLE_MIPS) && !defined(__native_client__) && \
defined(__mips__) && defined(__mips_dsp) && (__mips_dsp_rev >= 2) defined(__mips__) && defined(__mips_dsp) && (__mips_dsp_rev >= 2)
#define HAS_SCALEROWDOWN2_MIPS_DSPR2 #define HAS_SCALEROWDOWN2_DSPR2
#define HAS_SCALEROWDOWN4_MIPS_DSPR2 #define HAS_SCALEROWDOWN4_DSPR2
#define HAS_SCALEROWDOWN34_MIPS_DSPR2 #define HAS_SCALEROWDOWN34_DSPR2
#define HAS_SCALEROWDOWN38_MIPS_DSPR2 #define HAS_SCALEROWDOWN38_DSPR2
#endif #endif
// Scale ARGB vertically with bilinear interpolation. // Scale ARGB vertically with bilinear interpolation.
...@@ -468,28 +468,26 @@ void ScaleFilterCols_NEON(uint8* dst_ptr, const uint8* src_ptr, ...@@ -468,28 +468,26 @@ void ScaleFilterCols_NEON(uint8* dst_ptr, const uint8* src_ptr,
void ScaleFilterCols_Any_NEON(uint8* dst_ptr, const uint8* src_ptr, void ScaleFilterCols_Any_NEON(uint8* dst_ptr, const uint8* src_ptr,
int dst_width, int x, int dx); int dst_width, int x, int dx);
void ScaleRowDown2_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown2_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, uint8* dst, int dst_width);
uint8* dst, int dst_width); void ScaleRowDown2Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown2Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, uint8* dst, int dst_width);
uint8* dst, int dst_width); void ScaleRowDown4_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown4_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, uint8* dst, int dst_width);
uint8* dst, int dst_width); void ScaleRowDown4Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown4Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, uint8* dst, int dst_width);
uint8* dst, int dst_width); void ScaleRowDown34_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown34_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, uint8* dst, int dst_width);
uint8* dst, int dst_width); void ScaleRowDown34_0_Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown34_0_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, uint8* d, int dst_width);
uint8* d, int dst_width); void ScaleRowDown34_1_Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown34_1_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, uint8* d, int dst_width);
uint8* d, int dst_width); void ScaleRowDown38_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown38_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, uint8* dst, int dst_width);
uint8* dst, int dst_width); void ScaleRowDown38_2_Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown38_2_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, uint8* dst_ptr, int dst_width);
uint8* dst_ptr, int dst_width); void ScaleRowDown38_3_Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
void ScaleRowDown38_3_Box_MIPS_DSPR2(const uint8* src_ptr, uint8* dst_ptr, int dst_width);
ptrdiff_t src_stride,
uint8* dst_ptr, int dst_width);
#ifdef __cplusplus #ifdef __cplusplus
} // extern "C" } // extern "C"
......
...@@ -11,6 +11,6 @@ ...@@ -11,6 +11,6 @@
#ifndef INCLUDE_LIBYUV_VERSION_H_ // NOLINT #ifndef INCLUDE_LIBYUV_VERSION_H_ // NOLINT
#define INCLUDE_LIBYUV_VERSION_H_ #define INCLUDE_LIBYUV_VERSION_H_
#define LIBYUV_VERSION 1571 #define LIBYUV_VERSION 1572
#endif // INCLUDE_LIBYUV_VERSION_H_ NOLINT #endif // INCLUDE_LIBYUV_VERSION_H_ NOLINT
...@@ -303,14 +303,14 @@ static int X420ToI420(const uint8* src_y, ...@@ -303,14 +303,14 @@ static int X420ToI420(const uint8* src_y,
} }
} }
#endif #endif
#if defined(HAS_SPLITUVROW_MIPS_DSPR2) #if defined(HAS_SPLITUVROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(src_uv, 4) && IS_ALIGNED(src_stride_uv, 4) && IS_ALIGNED(src_uv, 4) && IS_ALIGNED(src_stride_uv, 4) &&
IS_ALIGNED(dst_u, 4) && IS_ALIGNED(dst_stride_u, 4) && IS_ALIGNED(dst_u, 4) && IS_ALIGNED(dst_stride_u, 4) &&
IS_ALIGNED(dst_v, 4) && IS_ALIGNED(dst_stride_v, 4)) { IS_ALIGNED(dst_v, 4) && IS_ALIGNED(dst_stride_v, 4)) {
SplitUVRow = SplitUVRow_Any_MIPS_DSPR2; SplitUVRow = SplitUVRow_Any_DSPR2;
if (IS_ALIGNED(halfwidth, 16)) { if (IS_ALIGNED(halfwidth, 16)) {
SplitUVRow = SplitUVRow_MIPS_DSPR2; SplitUVRow = SplitUVRow_DSPR2;
} }
} }
#endif #endif
......
...@@ -92,13 +92,13 @@ static int I420ToARGBMatrix(const uint8* src_y, int src_stride_y, ...@@ -92,13 +92,13 @@ static int I420ToARGBMatrix(const uint8* src_y, int src_stride_y,
} }
} }
#endif #endif
#if defined(HAS_I422TOARGBROW_MIPS_DSPR2) #if defined(HAS_I422TOARGBROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(width, 4) &&
IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) &&
IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) &&
IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) { IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) {
I422ToARGBRow = I422ToARGBRow_MIPS_DSPR2; I422ToARGBRow = I422ToARGBRow_DSPR2;
} }
#endif #endif
...@@ -262,13 +262,13 @@ static int I422ToARGBMatrix(const uint8* src_y, int src_stride_y, ...@@ -262,13 +262,13 @@ static int I422ToARGBMatrix(const uint8* src_y, int src_stride_y,
} }
} }
#endif #endif
#if defined(HAS_I422TOARGBROW_MIPS_DSPR2) #if defined(HAS_I422TOARGBROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(width, 4) &&
IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) &&
IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) &&
IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) { IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) {
I422ToARGBRow = I422ToARGBRow_MIPS_DSPR2; I422ToARGBRow = I422ToARGBRow_DSPR2;
} }
#endif #endif
...@@ -607,13 +607,13 @@ static int I420AlphaToARGBMatrix(const uint8* src_y, int src_stride_y, ...@@ -607,13 +607,13 @@ static int I420AlphaToARGBMatrix(const uint8* src_y, int src_stride_y,
} }
} }
#endif #endif
#if defined(HAS_I422ALPHATOARGBROW_MIPS_DSPR2) #if defined(HAS_I422ALPHATOARGBROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(width, 4) &&
IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) &&
IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) &&
IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) { IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) {
I422AlphaToARGBRow = I422AlphaToARGBRow_MIPS_DSPR2; I422AlphaToARGBRow = I422AlphaToARGBRow_DSPR2;
} }
#endif #endif
#if defined(HAS_ARGBATTENUATEROW_SSSE3) #if defined(HAS_ARGBATTENUATEROW_SSSE3)
......
...@@ -498,13 +498,13 @@ static int I420ToRGBAMatrix(const uint8* src_y, int src_stride_y, ...@@ -498,13 +498,13 @@ static int I420ToRGBAMatrix(const uint8* src_y, int src_stride_y,
} }
} }
#endif #endif
#if defined(HAS_I422TORGBAROW_MIPS_DSPR2) #if defined(HAS_I422TORGBAROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(width, 4) &&
IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) &&
IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) &&
IS_ALIGNED(dst_rgba, 4) && IS_ALIGNED(dst_stride_rgba, 4)) { IS_ALIGNED(dst_rgba, 4) && IS_ALIGNED(dst_stride_rgba, 4)) {
I422ToRGBARow = I422ToRGBARow_MIPS_DSPR2; I422ToRGBARow = I422ToRGBARow_DSPR2;
} }
#endif #endif
...@@ -888,12 +888,12 @@ int I420ToRGB565Dither(const uint8* src_y, int src_stride_y, ...@@ -888,12 +888,12 @@ int I420ToRGB565Dither(const uint8* src_y, int src_stride_y,
} }
} }
#endif #endif
#if defined(HAS_I422TOARGBROW_MIPS_DSPR2) #if defined(HAS_I422TOARGBROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(width, 4) &&
IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) &&
IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2)) { IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2)) {
I422ToARGBRow = I422ToARGBRow_MIPS_DSPR2; I422ToARGBRow = I422ToARGBRow_DSPR2;
} }
#endif #endif
#if defined(HAS_ARGBTORGB565DITHERROW_SSE2) #if defined(HAS_ARGBTORGB565DITHERROW_SSE2)
......
...@@ -251,15 +251,11 @@ int InitCpuFlags(void) { ...@@ -251,15 +251,11 @@ int InitCpuFlags(void) {
#endif #endif
#if defined(__mips__) && defined(__linux__) #if defined(__mips__) && defined(__linux__)
#if defined(__mips_dspr2) #if defined(__mips_dspr2)
cpu_info |= kCpuHasMIPS_DSPR2; cpu_info |= kCpuHasDSPR2;
#endif #endif
cpu_info |= kCpuHasMIPS; cpu_info |= kCpuHasMIPS;
if (getenv("LIBYUV_DISABLE_DSPR2")) {
if (getenv("LIBYUV_DISABLE_MIPS")) { cpu_info &= ~kCpuHasDSPR2;
cpu_info &= ~kCpuHasMIPS;
}
if (getenv("LIBYUV_DISABLE_MIPS_DSPR2")) {
cpu_info &= ~kCpuHasMIPS_DSPR2;
} }
#endif #endif
#if defined(__arm__) || defined(__aarch64__) #if defined(__arm__) || defined(__aarch64__)
......
...@@ -255,11 +255,11 @@ void MirrorPlane(const uint8* src_y, int src_stride_y, ...@@ -255,11 +255,11 @@ void MirrorPlane(const uint8* src_y, int src_stride_y,
} }
#endif #endif
// TODO(fbarchard): Mirror on mips handle unaligned memory. // TODO(fbarchard): Mirror on mips handle unaligned memory.
#if defined(HAS_MIRRORROW_MIPS_DSPR2) #if defined(HAS_MIRRORROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
IS_ALIGNED(dst_y, 4) && IS_ALIGNED(dst_stride_y, 4)) { IS_ALIGNED(dst_y, 4) && IS_ALIGNED(dst_stride_y, 4)) {
MirrorRow = MirrorRow_MIPS_DSPR2; MirrorRow = MirrorRow_DSPR2;
} }
#endif #endif
...@@ -986,13 +986,13 @@ static int I422ToRGBAMatrix(const uint8* src_y, int src_stride_y, ...@@ -986,13 +986,13 @@ static int I422ToRGBAMatrix(const uint8* src_y, int src_stride_y,
} }
} }
#endif #endif
#if defined(HAS_I422TORGBAROW_MIPS_DSPR2) #if defined(HAS_I422TORGBAROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(width, 4) &&
IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) &&
IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) &&
IS_ALIGNED(dst_rgba, 4) && IS_ALIGNED(dst_stride_rgba, 4)) { IS_ALIGNED(dst_rgba, 4) && IS_ALIGNED(dst_stride_rgba, 4)) {
I422ToRGBARow = I422ToRGBARow_MIPS_DSPR2; I422ToRGBARow = I422ToRGBARow_DSPR2;
} }
#endif #endif
...@@ -1906,13 +1906,13 @@ int InterpolatePlane(const uint8* src0, int src_stride0, ...@@ -1906,13 +1906,13 @@ int InterpolatePlane(const uint8* src0, int src_stride0,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(src0, 4) && IS_ALIGNED(src_stride0, 4) && IS_ALIGNED(src0, 4) && IS_ALIGNED(src_stride0, 4) &&
IS_ALIGNED(src1, 4) && IS_ALIGNED(src_stride1, 4) && IS_ALIGNED(src1, 4) && IS_ALIGNED(src_stride1, 4) &&
IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4) && IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4) &&
IS_ALIGNED(width, 4)) { IS_ALIGNED(width, 4)) {
InterpolateRow = InterpolateRow_MIPS_DSPR2; InterpolateRow = InterpolateRow_DSPR2;
} }
#endif #endif
......
...@@ -49,13 +49,13 @@ void TransposePlane(const uint8* src, int src_stride, ...@@ -49,13 +49,13 @@ void TransposePlane(const uint8* src, int src_stride,
} }
} }
#endif #endif
#if defined(HAS_TRANSPOSEWX8_MIPS_DSPR2) #if defined(HAS_TRANSPOSEWX8_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2)) { if (TestCpuFlag(kCpuHasDSPR2)) {
if (IS_ALIGNED(width, 4) && if (IS_ALIGNED(width, 4) &&
IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) { IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) {
TransposeWx8 = TransposeWx8_Fast_MIPS_DSPR2; TransposeWx8 = TransposeWx8_Fast_DSPR2;
} else { } else {
TransposeWx8 = TransposeWx8_MIPS_DSPR2; TransposeWx8 = TransposeWx8_DSPR2;
} }
} }
#endif #endif
...@@ -134,11 +134,11 @@ void RotatePlane180(const uint8* src, int src_stride, ...@@ -134,11 +134,11 @@ void RotatePlane180(const uint8* src, int src_stride,
} }
#endif #endif
// TODO(fbarchard): Mirror on mips handle unaligned memory. // TODO(fbarchard): Mirror on mips handle unaligned memory.
#if defined(HAS_MIRRORROW_MIPS_DSPR2) #if defined(HAS_MIRRORROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4) &&
IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4)) {
MirrorRow = MirrorRow_MIPS_DSPR2; MirrorRow = MirrorRow_DSPR2;
} }
#endif #endif
#if defined(HAS_COPYROW_SSE2) #if defined(HAS_COPYROW_SSE2)
...@@ -203,10 +203,10 @@ void TransposeUV(const uint8* src, int src_stride, ...@@ -203,10 +203,10 @@ void TransposeUV(const uint8* src, int src_stride,
} }
} }
#endif #endif
#if defined(HAS_TRANSPOSEUVWX8_MIPS_DSPR2) #if defined(HAS_TRANSPOSEUVWX8_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 2) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(width, 2) &&
IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) { IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) {
TransposeUVWx8 = TransposeUVWx8_MIPS_DSPR2; TransposeUVWx8 = TransposeUVWx8_DSPR2;
} }
#endif #endif
...@@ -279,10 +279,10 @@ void RotateUV180(const uint8* src, int src_stride, ...@@ -279,10 +279,10 @@ void RotateUV180(const uint8* src, int src_stride,
MirrorUVRow = MirrorUVRow_SSSE3; MirrorUVRow = MirrorUVRow_SSSE3;
} }
#endif #endif
#if defined(HAS_MIRRORUVROW_MIPS_DSPR2) #if defined(HAS_MIRRORUVROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) { IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) {
MirrorUVRow = MirrorUVRow_MIPS_DSPR2; MirrorUVRow = MirrorUVRow_DSPR2;
} }
#endif #endif
......
...@@ -38,8 +38,8 @@ TANY(TransposeWx8_Any_SSSE3, TransposeWx8_SSSE3, 7) ...@@ -38,8 +38,8 @@ TANY(TransposeWx8_Any_SSSE3, TransposeWx8_SSSE3, 7)
#ifdef HAS_TRANSPOSEWX8_FAST_SSSE3 #ifdef HAS_TRANSPOSEWX8_FAST_SSSE3
TANY(TransposeWx8_Fast_Any_SSSE3, TransposeWx8_Fast_SSSE3, 15) TANY(TransposeWx8_Fast_Any_SSSE3, TransposeWx8_Fast_SSSE3, 15)
#endif #endif
#ifdef HAS_TRANSPOSEWX8_MIPS_DSPR2 #ifdef HAS_TRANSPOSEWX8_DSPR2
TANY(TransposeWx8_Any_MIPS_DSPR2, TransposeWx8_MIPS_DSPR2, 7) TANY(TransposeWx8_Any_DSPR2, TransposeWx8_DSPR2, 7)
#endif #endif
#undef TANY #undef TANY
...@@ -64,8 +64,8 @@ TUVANY(TransposeUVWx8_Any_NEON, TransposeUVWx8_NEON, 7) ...@@ -64,8 +64,8 @@ TUVANY(TransposeUVWx8_Any_NEON, TransposeUVWx8_NEON, 7)
#ifdef HAS_TRANSPOSEUVWX8_SSE2 #ifdef HAS_TRANSPOSEUVWX8_SSE2
TUVANY(TransposeUVWx8_Any_SSE2, TransposeUVWx8_SSE2, 7) TUVANY(TransposeUVWx8_Any_SSE2, TransposeUVWx8_SSE2, 7)
#endif #endif
#ifdef HAS_TRANSPOSEUVWX8_MIPS_DSPR2 #ifdef HAS_TRANSPOSEUVWX8_DSPR2
TUVANY(TransposeUVWx8_Any_MIPS_DSPR2, TransposeUVWx8_MIPS_DSPR2, 7) TUVANY(TransposeUVWx8_Any_DSPR2, TransposeUVWx8_DSPR2, 7)
#endif #endif
#undef TUVANY #undef TUVANY
......
...@@ -22,7 +22,7 @@ extern "C" { ...@@ -22,7 +22,7 @@ extern "C" {
defined(__mips_dsp) && (__mips_dsp_rev >= 2) && \ defined(__mips_dsp) && (__mips_dsp_rev >= 2) && \
(_MIPS_SIM == _MIPS_SIM_ABI32) (_MIPS_SIM == _MIPS_SIM_ABI32)
void TransposeWx8_MIPS_DSPR2(const uint8* src, int src_stride, void TransposeWx8_DSPR2(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width) { uint8* dst, int dst_stride, int width) {
__asm__ __volatile__ ( __asm__ __volatile__ (
".set push \n" ".set push \n"
...@@ -106,7 +106,7 @@ void TransposeWx8_MIPS_DSPR2(const uint8* src, int src_stride, ...@@ -106,7 +106,7 @@ void TransposeWx8_MIPS_DSPR2(const uint8* src, int src_stride,
); );
} }
void TransposeWx8_Fast_MIPS_DSPR2(const uint8* src, int src_stride, void TransposeWx8_Fast_DSPR2(const uint8* src, int src_stride,
uint8* dst, int dst_stride, int width) { uint8* dst, int dst_stride, int width) {
__asm__ __volatile__ ( __asm__ __volatile__ (
".set noat \n" ".set noat \n"
...@@ -308,7 +308,7 @@ void TransposeWx8_Fast_MIPS_DSPR2(const uint8* src, int src_stride, ...@@ -308,7 +308,7 @@ void TransposeWx8_Fast_MIPS_DSPR2(const uint8* src, int src_stride,
); );
} }
void TransposeUVWx8_MIPS_DSPR2(const uint8* src, int src_stride, void TransposeUVWx8_DSPR2(const uint8* src, int src_stride,
uint8* dst_a, int dst_stride_a, uint8* dst_a, int dst_stride_a,
uint8* dst_b, int dst_stride_b, uint8* dst_b, int dst_stride_b,
int width) { int width) {
......
...@@ -596,8 +596,8 @@ ANY11T(InterpolateRow_Any_SSSE3, InterpolateRow_SSSE3, 1, 1, 15) ...@@ -596,8 +596,8 @@ ANY11T(InterpolateRow_Any_SSSE3, InterpolateRow_SSSE3, 1, 1, 15)
#ifdef HAS_INTERPOLATEROW_NEON #ifdef HAS_INTERPOLATEROW_NEON
ANY11T(InterpolateRow_Any_NEON, InterpolateRow_NEON, 1, 1, 15) ANY11T(InterpolateRow_Any_NEON, InterpolateRow_NEON, 1, 1, 15)
#endif #endif
#ifdef HAS_INTERPOLATEROW_MIPS_DSPR2 #ifdef HAS_INTERPOLATEROW_DSPR2
ANY11T(InterpolateRow_Any_MIPS_DSPR2, InterpolateRow_MIPS_DSPR2, 1, 1, 3) ANY11T(InterpolateRow_Any_DSPR2, InterpolateRow_DSPR2, 1, 1, 3)
#endif #endif
#undef ANY11T #undef ANY11T
...@@ -705,8 +705,8 @@ ANY12(SplitUVRow_Any_AVX2, SplitUVRow_AVX2, 0, 2, 0, 31) ...@@ -705,8 +705,8 @@ ANY12(SplitUVRow_Any_AVX2, SplitUVRow_AVX2, 0, 2, 0, 31)
#ifdef HAS_SPLITUVROW_NEON #ifdef HAS_SPLITUVROW_NEON
ANY12(SplitUVRow_Any_NEON, SplitUVRow_NEON, 0, 2, 0, 15) ANY12(SplitUVRow_Any_NEON, SplitUVRow_NEON, 0, 2, 0, 15)
#endif #endif
#ifdef HAS_SPLITUVROW_MIPS_DSPR2 #ifdef HAS_SPLITUVROW_DSPR2
ANY12(SplitUVRow_Any_MIPS_DSPR2, SplitUVRow_MIPS_DSPR2, 0, 2, 0, 15) ANY12(SplitUVRow_Any_DSPR2, SplitUVRow_DSPR2, 0, 2, 0, 15)
#endif #endif
#ifdef HAS_ARGBTOUV444ROW_SSSE3 #ifdef HAS_ARGBTOUV444ROW_SSSE3
ANY12(ARGBToUV444Row_Any_SSSE3, ARGBToUV444Row_SSSE3, 0, 4, 0, 15) ANY12(ARGBToUV444Row_Any_SSSE3, ARGBToUV444Row_SSSE3, 0, 4, 0, 15)
......
...@@ -375,12 +375,12 @@ void CopyRow_MIPS(const uint8* src, uint8* dst, int count) { ...@@ -375,12 +375,12 @@ void CopyRow_MIPS(const uint8* src, uint8* dst, int count) {
} }
#endif // HAS_COPYROW_MIPS #endif // HAS_COPYROW_MIPS
// MIPS DSPR2 functions // DSPR2 functions
#if !defined(LIBYUV_DISABLE_MIPS) && defined(__mips_dsp) && \ #if !defined(LIBYUV_DISABLE_MIPS) && defined(__mips_dsp) && \
(__mips_dsp_rev >= 2) && \ (__mips_dsp_rev >= 2) && \
(_MIPS_SIM == _MIPS_SIM_ABI32) && (__mips_isa_rev < 6) (_MIPS_SIM == _MIPS_SIM_ABI32) && (__mips_isa_rev < 6)
void SplitUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void SplitUVRow_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width) { int width) {
__asm__ __volatile__ ( __asm__ __volatile__ (
".set push \n" ".set push \n"
...@@ -446,7 +446,7 @@ void SplitUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, ...@@ -446,7 +446,7 @@ void SplitUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
); );
} }
void MirrorRow_MIPS_DSPR2(const uint8* src, uint8* dst, int width) { void MirrorRow_DSPR2(const uint8* src, uint8* dst, int width) {
__asm__ __volatile__ ( __asm__ __volatile__ (
".set push \n" ".set push \n"
".set noreorder \n" ".set noreorder \n"
...@@ -496,7 +496,7 @@ void MirrorRow_MIPS_DSPR2(const uint8* src, uint8* dst, int width) { ...@@ -496,7 +496,7 @@ void MirrorRow_MIPS_DSPR2(const uint8* src, uint8* dst, int width) {
); );
} }
void MirrorUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, void MirrorUVRow_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
int width) { int width) {
int x = 0; int x = 0;
int y = 0; int y = 0;
...@@ -653,7 +653,7 @@ void MirrorUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, ...@@ -653,7 +653,7 @@ void MirrorUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v,
"addu.ph $t1, $t1, $s5 \n" "addu.ph $t1, $t1, $s5 \n"
// TODO(fbarchard): accept yuv conversion constants. // TODO(fbarchard): accept yuv conversion constants.
void I422ToARGBRow_MIPS_DSPR2(const uint8* y_buf, void I422ToARGBRow_DSPR2(const uint8* y_buf,
const uint8* u_buf, const uint8* u_buf,
const uint8* v_buf, const uint8* v_buf,
uint8* rgb_buf, uint8* rgb_buf,
...@@ -716,7 +716,7 @@ void I422ToARGBRow_MIPS_DSPR2(const uint8* y_buf, ...@@ -716,7 +716,7 @@ void I422ToARGBRow_MIPS_DSPR2(const uint8* y_buf,
} }
// Bilinear filter 8x2 -> 8x1 // Bilinear filter 8x2 -> 8x1
void InterpolateRow_MIPS_DSPR2(uint8* dst_ptr, const uint8* src_ptr, void InterpolateRow_DSPR2(uint8* dst_ptr, const uint8* src_ptr,
ptrdiff_t src_stride, int dst_width, ptrdiff_t src_stride, int dst_width,
int source_y_fraction) { int source_y_fraction) {
int y0_fraction = 256 - source_y_fraction; int y0_fraction = 256 - source_y_fraction;
......
...@@ -85,12 +85,12 @@ static void ScalePlaneDown2(int src_width, int src_height, ...@@ -85,12 +85,12 @@ static void ScalePlaneDown2(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_SCALEROWDOWN2_MIPS_DSPR2) #if defined(HAS_SCALEROWDOWN2_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(src_ptr, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(src_ptr, 4) &&
IS_ALIGNED(src_stride, 4) && IS_ALIGNED(row_stride, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(row_stride, 4) &&
IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) {
ScaleRowDown2 = filtering ? ScaleRowDown2 = filtering ?
ScaleRowDown2Box_MIPS_DSPR2 : ScaleRowDown2_MIPS_DSPR2; ScaleRowDown2Box_DSPR2 : ScaleRowDown2_DSPR2;
} }
#endif #endif
...@@ -135,12 +135,12 @@ static void ScalePlaneDown2_16(int src_width, int src_height, ...@@ -135,12 +135,12 @@ static void ScalePlaneDown2_16(int src_width, int src_height,
ScaleRowDown2Box_16_SSE2); ScaleRowDown2Box_16_SSE2);
} }
#endif #endif
#if defined(HAS_SCALEROWDOWN2_16_MIPS_DSPR2) #if defined(HAS_SCALEROWDOWN2_16_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(src_ptr, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(src_ptr, 4) &&
IS_ALIGNED(src_stride, 4) && IS_ALIGNED(row_stride, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(row_stride, 4) &&
IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) {
ScaleRowDown2 = filtering ? ScaleRowDown2 = filtering ?
ScaleRowDown2Box_16_MIPS_DSPR2 : ScaleRowDown2_16_MIPS_DSPR2; ScaleRowDown2Box_16_DSPR2 : ScaleRowDown2_16_DSPR2;
} }
#endif #endif
...@@ -200,12 +200,12 @@ static void ScalePlaneDown4(int src_width, int src_height, ...@@ -200,12 +200,12 @@ static void ScalePlaneDown4(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_SCALEROWDOWN4_MIPS_DSPR2) #if defined(HAS_SCALEROWDOWN4_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(row_stride, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(row_stride, 4) &&
IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) &&
IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) {
ScaleRowDown4 = filtering ? ScaleRowDown4 = filtering ?
ScaleRowDown4Box_MIPS_DSPR2 : ScaleRowDown4_MIPS_DSPR2; ScaleRowDown4Box_DSPR2 : ScaleRowDown4_DSPR2;
} }
#endif #endif
...@@ -245,12 +245,12 @@ static void ScalePlaneDown4_16(int src_width, int src_height, ...@@ -245,12 +245,12 @@ static void ScalePlaneDown4_16(int src_width, int src_height,
ScaleRowDown4_16_SSE2; ScaleRowDown4_16_SSE2;
} }
#endif #endif
#if defined(HAS_SCALEROWDOWN4_16_MIPS_DSPR2) #if defined(HAS_SCALEROWDOWN4_16_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(row_stride, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(row_stride, 4) &&
IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) &&
IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) {
ScaleRowDown4 = filtering ? ScaleRowDown4 = filtering ?
ScaleRowDown4Box_16_MIPS_DSPR2 : ScaleRowDown4_16_MIPS_DSPR2; ScaleRowDown4Box_16_DSPR2 : ScaleRowDown4_16_DSPR2;
} }
#endif #endif
...@@ -325,16 +325,16 @@ static void ScalePlaneDown34(int src_width, int src_height, ...@@ -325,16 +325,16 @@ static void ScalePlaneDown34(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_SCALEROWDOWN34_MIPS_DSPR2) #if defined(HAS_SCALEROWDOWN34_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && (dst_width % 24 == 0) && if (TestCpuFlag(kCpuHasDSPR2) && (dst_width % 24 == 0) &&
IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) &&
IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) {
if (!filtering) { if (!filtering) {
ScaleRowDown34_0 = ScaleRowDown34_MIPS_DSPR2; ScaleRowDown34_0 = ScaleRowDown34_DSPR2;
ScaleRowDown34_1 = ScaleRowDown34_MIPS_DSPR2; ScaleRowDown34_1 = ScaleRowDown34_DSPR2;
} else { } else {
ScaleRowDown34_0 = ScaleRowDown34_0_Box_MIPS_DSPR2; ScaleRowDown34_0 = ScaleRowDown34_0_Box_DSPR2;
ScaleRowDown34_1 = ScaleRowDown34_1_Box_MIPS_DSPR2; ScaleRowDown34_1 = ScaleRowDown34_1_Box_DSPR2;
} }
} }
#endif #endif
...@@ -404,16 +404,16 @@ static void ScalePlaneDown34_16(int src_width, int src_height, ...@@ -404,16 +404,16 @@ static void ScalePlaneDown34_16(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_SCALEROWDOWN34_16_MIPS_DSPR2) #if defined(HAS_SCALEROWDOWN34_16_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && (dst_width % 24 == 0) && if (TestCpuFlag(kCpuHasDSPR2) && (dst_width % 24 == 0) &&
IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) &&
IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) {
if (!filtering) { if (!filtering) {
ScaleRowDown34_0 = ScaleRowDown34_16_MIPS_DSPR2; ScaleRowDown34_0 = ScaleRowDown34_16_DSPR2;
ScaleRowDown34_1 = ScaleRowDown34_16_MIPS_DSPR2; ScaleRowDown34_1 = ScaleRowDown34_16_DSPR2;
} else { } else {
ScaleRowDown34_0 = ScaleRowDown34_0_Box_16_MIPS_DSPR2; ScaleRowDown34_0 = ScaleRowDown34_0_Box_16_DSPR2;
ScaleRowDown34_1 = ScaleRowDown34_1_Box_16_MIPS_DSPR2; ScaleRowDown34_1 = ScaleRowDown34_1_Box_16_DSPR2;
} }
} }
#endif #endif
...@@ -517,16 +517,16 @@ static void ScalePlaneDown38(int src_width, int src_height, ...@@ -517,16 +517,16 @@ static void ScalePlaneDown38(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_SCALEROWDOWN38_MIPS_DSPR2) #if defined(HAS_SCALEROWDOWN38_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && (dst_width % 12 == 0) && if (TestCpuFlag(kCpuHasDSPR2) && (dst_width % 12 == 0) &&
IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) &&
IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) {
if (!filtering) { if (!filtering) {
ScaleRowDown38_3 = ScaleRowDown38_MIPS_DSPR2; ScaleRowDown38_3 = ScaleRowDown38_DSPR2;
ScaleRowDown38_2 = ScaleRowDown38_MIPS_DSPR2; ScaleRowDown38_2 = ScaleRowDown38_DSPR2;
} else { } else {
ScaleRowDown38_3 = ScaleRowDown38_3_Box_MIPS_DSPR2; ScaleRowDown38_3 = ScaleRowDown38_3_Box_DSPR2;
ScaleRowDown38_2 = ScaleRowDown38_2_Box_MIPS_DSPR2; ScaleRowDown38_2 = ScaleRowDown38_2_Box_DSPR2;
} }
} }
#endif #endif
...@@ -595,16 +595,16 @@ static void ScalePlaneDown38_16(int src_width, int src_height, ...@@ -595,16 +595,16 @@ static void ScalePlaneDown38_16(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_SCALEROWDOWN38_16_MIPS_DSPR2) #if defined(HAS_SCALEROWDOWN38_16_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && (dst_width % 12 == 0) && if (TestCpuFlag(kCpuHasDSPR2) && (dst_width % 12 == 0) &&
IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(src_ptr, 4) && IS_ALIGNED(src_stride, 4) &&
IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_ptr, 4) && IS_ALIGNED(dst_stride, 4)) {
if (!filtering) { if (!filtering) {
ScaleRowDown38_3 = ScaleRowDown38_16_MIPS_DSPR2; ScaleRowDown38_3 = ScaleRowDown38_16_DSPR2;
ScaleRowDown38_2 = ScaleRowDown38_16_MIPS_DSPR2; ScaleRowDown38_2 = ScaleRowDown38_16_DSPR2;
} else { } else {
ScaleRowDown38_3 = ScaleRowDown38_3_Box_16_MIPS_DSPR2; ScaleRowDown38_3 = ScaleRowDown38_3_Box_16_DSPR2;
ScaleRowDown38_2 = ScaleRowDown38_2_Box_16_MIPS_DSPR2; ScaleRowDown38_2 = ScaleRowDown38_2_Box_16_DSPR2;
} }
} }
#endif #endif
...@@ -898,11 +898,11 @@ void ScalePlaneBilinearDown(int src_width, int src_height, ...@@ -898,11 +898,11 @@ void ScalePlaneBilinearDown(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2)) { if (TestCpuFlag(kCpuHasDSPR2)) {
InterpolateRow = InterpolateRow_Any_MIPS_DSPR2; InterpolateRow = InterpolateRow_Any_DSPR2;
if (IS_ALIGNED(src_width, 4)) { if (IS_ALIGNED(src_width, 4)) {
InterpolateRow = InterpolateRow_MIPS_DSPR2; InterpolateRow = InterpolateRow_DSPR2;
} }
} }
#endif #endif
...@@ -1002,11 +1002,11 @@ void ScalePlaneBilinearDown_16(int src_width, int src_height, ...@@ -1002,11 +1002,11 @@ void ScalePlaneBilinearDown_16(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_16_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_16_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2)) { if (TestCpuFlag(kCpuHasDSPR2)) {
InterpolateRow = InterpolateRow_Any_16_MIPS_DSPR2; InterpolateRow = InterpolateRow_Any_16_DSPR2;
if (IS_ALIGNED(src_width, 4)) { if (IS_ALIGNED(src_width, 4)) {
InterpolateRow = InterpolateRow_16_MIPS_DSPR2; InterpolateRow = InterpolateRow_16_DSPR2;
} }
} }
#endif #endif
...@@ -1087,11 +1087,11 @@ void ScalePlaneBilinearUp(int src_width, int src_height, ...@@ -1087,11 +1087,11 @@ void ScalePlaneBilinearUp(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2)) { if (TestCpuFlag(kCpuHasDSPR2)) {
InterpolateRow = InterpolateRow_Any_MIPS_DSPR2; InterpolateRow = InterpolateRow_Any_DSPR2;
if (IS_ALIGNED(dst_width, 4)) { if (IS_ALIGNED(dst_width, 4)) {
InterpolateRow = InterpolateRow_MIPS_DSPR2; InterpolateRow = InterpolateRow_DSPR2;
} }
} }
#endif #endif
...@@ -1226,11 +1226,11 @@ void ScalePlaneBilinearUp_16(int src_width, int src_height, ...@@ -1226,11 +1226,11 @@ void ScalePlaneBilinearUp_16(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_16_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_16_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2)) { if (TestCpuFlag(kCpuHasDSPR2)) {
InterpolateRow = InterpolateRow_Any_16_MIPS_DSPR2; InterpolateRow = InterpolateRow_Any_16_DSPR2;
if (IS_ALIGNED(dst_width, 4)) { if (IS_ALIGNED(dst_width, 4)) {
InterpolateRow = InterpolateRow_16_MIPS_DSPR2; InterpolateRow = InterpolateRow_16_DSPR2;
} }
} }
#endif #endif
......
...@@ -234,12 +234,12 @@ static void ScaleARGBBilinearDown(int src_width, int src_height, ...@@ -234,12 +234,12 @@ static void ScaleARGBBilinearDown(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(src_argb, 4) && IS_ALIGNED(src_stride, 4)) { IS_ALIGNED(src_argb, 4) && IS_ALIGNED(src_stride, 4)) {
InterpolateRow = InterpolateRow_Any_MIPS_DSPR2; InterpolateRow = InterpolateRow_Any_DSPR2;
if (IS_ALIGNED(clip_src_width, 4)) { if (IS_ALIGNED(clip_src_width, 4)) {
InterpolateRow = InterpolateRow_MIPS_DSPR2; InterpolateRow = InterpolateRow_DSPR2;
} }
} }
#endif #endif
...@@ -324,10 +324,10 @@ static void ScaleARGBBilinearUp(int src_width, int src_height, ...@@ -324,10 +324,10 @@ static void ScaleARGBBilinearUp(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride, 4)) {
InterpolateRow = InterpolateRow_MIPS_DSPR2; InterpolateRow = InterpolateRow_DSPR2;
} }
#endif #endif
if (src_width >= 32768) { if (src_width >= 32768) {
...@@ -465,13 +465,13 @@ static void ScaleYUVToARGBBilinearUp(int src_width, int src_height, ...@@ -465,13 +465,13 @@ static void ScaleYUVToARGBBilinearUp(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_I422TOARGBROW_MIPS_DSPR2) #if defined(HAS_I422TOARGBROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(src_width, 4) && if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(src_width, 4) &&
IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) &&
IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) &&
IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) { IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) {
I422ToARGBRow = I422ToARGBRow_MIPS_DSPR2; I422ToARGBRow = I422ToARGBRow_DSPR2;
} }
#endif #endif
...@@ -502,10 +502,10 @@ static void ScaleYUVToARGBBilinearUp(int src_width, int src_height, ...@@ -502,10 +502,10 @@ static void ScaleYUVToARGBBilinearUp(int src_width, int src_height,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) { IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride_argb, 4)) {
InterpolateRow = InterpolateRow_MIPS_DSPR2; InterpolateRow = InterpolateRow_DSPR2;
} }
#endif #endif
...@@ -835,7 +835,6 @@ int YUVToARGBScaleClip(const uint8* src_y, int src_stride_y, ...@@ -835,7 +835,6 @@ int YUVToARGBScaleClip(const uint8* src_y, int src_stride_y,
int dst_width, int dst_height, int dst_width, int dst_height,
int clip_x, int clip_y, int clip_width, int clip_height, int clip_x, int clip_y, int clip_width, int clip_height,
enum FilterMode filtering) { enum FilterMode filtering) {
uint8* argb_buffer = (uint8*)malloc(src_width * src_height * 4); uint8* argb_buffer = (uint8*)malloc(src_width * src_height * 4);
int r; int r;
I420ToARGB(src_y, src_stride_y, I420ToARGB(src_y, src_stride_y,
......
...@@ -922,13 +922,13 @@ void ScalePlaneVertical(int src_height, ...@@ -922,13 +922,13 @@ void ScalePlaneVertical(int src_height,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(src_argb, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(src_argb, 4) && IS_ALIGNED(src_stride, 4) &&
IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride, 4)) {
InterpolateRow = InterpolateRow_Any_MIPS_DSPR2; InterpolateRow = InterpolateRow_Any_DSPR2;
if (IS_ALIGNED(dst_width_bytes, 4)) { if (IS_ALIGNED(dst_width_bytes, 4)) {
InterpolateRow = InterpolateRow_MIPS_DSPR2; InterpolateRow = InterpolateRow_DSPR2;
} }
} }
#endif #endif
...@@ -996,13 +996,13 @@ void ScalePlaneVertical_16(int src_height, ...@@ -996,13 +996,13 @@ void ScalePlaneVertical_16(int src_height,
} }
} }
#endif #endif
#if defined(HAS_INTERPOLATEROW_16_MIPS_DSPR2) #if defined(HAS_INTERPOLATEROW_16_DSPR2)
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && if (TestCpuFlag(kCpuHasDSPR2) &&
IS_ALIGNED(src_argb, 4) && IS_ALIGNED(src_stride, 4) && IS_ALIGNED(src_argb, 4) && IS_ALIGNED(src_stride, 4) &&
IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride, 4)) { IS_ALIGNED(dst_argb, 4) && IS_ALIGNED(dst_stride, 4)) {
InterpolateRow = InterpolateRow_Any_16_MIPS_DSPR2; InterpolateRow = InterpolateRow_Any_16_DSPR2;
if (IS_ALIGNED(dst_width_bytes, 4)) { if (IS_ALIGNED(dst_width_bytes, 4)) {
InterpolateRow = InterpolateRow_16_MIPS_DSPR2; InterpolateRow = InterpolateRow_16_DSPR2;
} }
} }
#endif #endif
......
...@@ -21,8 +21,8 @@ extern "C" { ...@@ -21,8 +21,8 @@ extern "C" {
defined(__mips_dsp) && (__mips_dsp_rev >= 2) && \ defined(__mips_dsp) && (__mips_dsp_rev >= 2) && \
(_MIPS_SIM == _MIPS_SIM_ABI32) (_MIPS_SIM == _MIPS_SIM_ABI32)
void ScaleRowDown2_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, void ScaleRowDown2_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
uint8* dst, int dst_width) { uint8* dst, int dst_width) {
__asm__ __volatile__( __asm__ __volatile__(
".set push \n" ".set push \n"
".set noreorder \n" ".set noreorder \n"
...@@ -77,8 +77,8 @@ void ScaleRowDown2_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, ...@@ -77,8 +77,8 @@ void ScaleRowDown2_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
); );
} }
void ScaleRowDown2Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, void ScaleRowDown2Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
uint8* dst, int dst_width) { uint8* dst, int dst_width) {
const uint8* t = src_ptr + src_stride; const uint8* t = src_ptr + src_stride;
__asm__ __volatile__ ( __asm__ __volatile__ (
...@@ -176,8 +176,8 @@ void ScaleRowDown2Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, ...@@ -176,8 +176,8 @@ void ScaleRowDown2Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
); );
} }
void ScaleRowDown4_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, void ScaleRowDown4_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
uint8* dst, int dst_width) { uint8* dst, int dst_width) {
__asm__ __volatile__ ( __asm__ __volatile__ (
".set push \n" ".set push \n"
".set noreorder \n" ".set noreorder \n"
...@@ -231,8 +231,8 @@ void ScaleRowDown4_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, ...@@ -231,8 +231,8 @@ void ScaleRowDown4_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
); );
} }
void ScaleRowDown4Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, void ScaleRowDown4Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
uint8* dst, int dst_width) { uint8* dst, int dst_width) {
intptr_t stride = src_stride; intptr_t stride = src_stride;
const uint8* s1 = src_ptr + stride; const uint8* s1 = src_ptr + stride;
const uint8* s2 = s1 + stride; const uint8* s2 = s1 + stride;
...@@ -310,8 +310,8 @@ void ScaleRowDown4Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, ...@@ -310,8 +310,8 @@ void ScaleRowDown4Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
); );
} }
void ScaleRowDown34_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, void ScaleRowDown34_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
uint8* dst, int dst_width) { uint8* dst, int dst_width) {
__asm__ __volatile__ ( __asm__ __volatile__ (
".set push \n" ".set push \n"
".set noreorder \n" ".set noreorder \n"
...@@ -356,8 +356,8 @@ void ScaleRowDown34_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, ...@@ -356,8 +356,8 @@ void ScaleRowDown34_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
); );
} }
void ScaleRowDown34_0_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, void ScaleRowDown34_0_Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
uint8* d, int dst_width) { uint8* d, int dst_width) {
__asm__ __volatile__ ( __asm__ __volatile__ (
".set push \n" ".set push \n"
".set noreorder \n" ".set noreorder \n"
...@@ -412,8 +412,8 @@ void ScaleRowDown34_0_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, ...@@ -412,8 +412,8 @@ void ScaleRowDown34_0_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
); );
} }
void ScaleRowDown34_1_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, void ScaleRowDown34_1_Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
uint8* d, int dst_width) { uint8* d, int dst_width) {
__asm__ __volatile__ ( __asm__ __volatile__ (
".set push \n" ".set push \n"
".set noreorder \n" ".set noreorder \n"
...@@ -464,8 +464,8 @@ void ScaleRowDown34_1_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, ...@@ -464,8 +464,8 @@ void ScaleRowDown34_1_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
); );
} }
void ScaleRowDown38_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, void ScaleRowDown38_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
uint8* dst, int dst_width) { uint8* dst, int dst_width) {
__asm__ __volatile__ ( __asm__ __volatile__ (
".set push \n" ".set push \n"
".set noreorder \n" ".set noreorder \n"
...@@ -510,8 +510,8 @@ void ScaleRowDown38_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, ...@@ -510,8 +510,8 @@ void ScaleRowDown38_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
); );
} }
void ScaleRowDown38_2_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, void ScaleRowDown38_2_Box_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
uint8* dst_ptr, int dst_width) { uint8* dst_ptr, int dst_width) {
intptr_t stride = src_stride; intptr_t stride = src_stride;
const uint8* t = src_ptr + stride; const uint8* t = src_ptr + stride;
const int c = 0x2AAA; const int c = 0x2AAA;
...@@ -563,9 +563,9 @@ void ScaleRowDown38_2_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride, ...@@ -563,9 +563,9 @@ void ScaleRowDown38_2_Box_MIPS_DSPR2(const uint8* src_ptr, ptrdiff_t src_stride,
); );
} }
void ScaleRowDown38_3_Box_MIPS_DSPR2(const uint8* src_ptr, void ScaleRowDown38_3_Box_DSPR2(const uint8* src_ptr,
ptrdiff_t src_stride, ptrdiff_t src_stride,
uint8* dst_ptr, int dst_width) { uint8* dst_ptr, int dst_width) {
intptr_t stride = src_stride; intptr_t stride = src_stride;
const uint8* s1 = src_ptr + stride; const uint8* s1 = src_ptr + stride;
stride += stride; stride += stride;
......
...@@ -48,8 +48,8 @@ TEST_F(LibYUVBaseTest, TestCpuHas) { ...@@ -48,8 +48,8 @@ TEST_F(LibYUVBaseTest, TestCpuHas) {
printf("Has AVX3 %x\n", has_avx3); printf("Has AVX3 %x\n", has_avx3);
int has_mips = TestCpuFlag(kCpuHasMIPS); int has_mips = TestCpuFlag(kCpuHasMIPS);
printf("Has MIPS %x\n", has_mips); printf("Has MIPS %x\n", has_mips);
int has_mips_dspr2 = TestCpuFlag(kCpuHasMIPS_DSPR2); int has_dspr2 = TestCpuFlag(kCpuHasDSPR2);
printf("Has MIPS DSPR2 %x\n", has_mips_dspr2); printf("Has DSPR2 %x\n", has_dspr2);
} }
TEST_F(LibYUVBaseTest, TestCpuCompilerEnabled) { TEST_F(LibYUVBaseTest, TestCpuCompilerEnabled) {
......
...@@ -66,8 +66,8 @@ int main(int argc, const char* argv[]) { ...@@ -66,8 +66,8 @@ int main(int argc, const char* argv[]) {
printf("Has NEON %x\n", has_neon); printf("Has NEON %x\n", has_neon);
} }
if (has_mips) { if (has_mips) {
int has_mips_dspr2 = TestCpuFlag(kCpuHasMIPS_DSPR2); int has_dspr2 = TestCpuFlag(kCpuHasDSPR2);
printf("Has MIPS DSPR2 %x\n", has_mips_dspr2); printf("Has DSPR2 %x\n", has_dspr2);
} }
if (has_x86) { if (has_x86) {
int has_sse2 = TestCpuFlag(kCpuHasSSE2); int has_sse2 = TestCpuFlag(kCpuHasSSE2);
......
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