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submodule
ffmpeg
Commits
6bb70dfd
Commit
6bb70dfd
authored
May 30, 2011
by
Mans Rullgard
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ARM: simplify inline asm with 64-bit operands
Signed-off-by:
Mans Rullgard
<
mans@mansr.com
>
parent
371266da
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Showing
2 changed files
with
13 additions
and
17 deletions
+13
-17
mathops.h
libavcodec/arm/mathops.h
+5
-8
intreadwrite.h
libavutil/arm/intreadwrite.h
+8
-9
No files found.
libavcodec/arm/mathops.h
View file @
6bb70dfd
...
@@ -59,19 +59,16 @@ static inline av_const int MULH(int a, int b)
...
@@ -59,19 +59,16 @@ static inline av_const int MULH(int a, int b)
static
inline
av_const
int64_t
MUL64
(
int
a
,
int
b
)
static
inline
av_const
int64_t
MUL64
(
int
a
,
int
b
)
{
{
union
{
uint64_t
x
;
unsigned
hl
[
2
];
}
x
;
int64_t
x
;
__asm__
(
"smull %0, %1, %2, %3"
__asm__
(
"smull %Q0, %R0, %1, %2"
:
"=r"
(
x
)
:
"r"
(
a
),
"r"
(
b
));
:
"=r"
(
x
.
hl
[
0
]),
"=r"
(
x
.
hl
[
1
])
:
"r"
(
a
),
"r"
(
b
));
return
x
;
return
x
.
x
;
}
}
#define MUL64 MUL64
#define MUL64 MUL64
static
inline
av_const
int64_t
MAC64
(
int64_t
d
,
int
a
,
int
b
)
static
inline
av_const
int64_t
MAC64
(
int64_t
d
,
int
a
,
int
b
)
{
{
union
{
uint64_t
x
;
unsigned
hl
[
2
];
}
x
=
{
d
};
__asm__
(
"smlal %Q0, %R0, %1, %2"
:
"+r"
(
d
)
:
"r"
(
a
),
"r"
(
b
));
__asm__
(
"smlal %0, %1, %2, %3"
return
d
;
:
"+r"
(
x
.
hl
[
0
]),
"+r"
(
x
.
hl
[
1
])
:
"r"
(
a
),
"r"
(
b
));
return
x
.
x
;
}
}
#define MAC64(d, a, b) ((d) = MAC64(d, a, b))
#define MAC64(d, a, b) ((d) = MAC64(d, a, b))
#define MLS64(d, a, b) MAC64(d, -(a), b)
#define MLS64(d, a, b) MAC64(d, -(a), b)
...
...
libavutil/arm/intreadwrite.h
View file @
6bb70dfd
...
@@ -55,22 +55,21 @@ static av_always_inline void AV_WN32(void *p, uint32_t v)
...
@@ -55,22 +55,21 @@ static av_always_inline void AV_WN32(void *p, uint32_t v)
#define AV_RN64 AV_RN64
#define AV_RN64 AV_RN64
static
av_always_inline
uint64_t
AV_RN64
(
const
void
*
p
)
static
av_always_inline
uint64_t
AV_RN64
(
const
void
*
p
)
{
{
u
nion
{
uint64_t
v
;
uint32_t
hl
[
2
];
}
v
;
u
int64_t
v
;
__asm__
(
"ldr %
0, %2
\n\t
"
__asm__
(
"ldr %
Q0, %1
\n\t
"
"ldr %
1, %3
\n\t
"
"ldr %
R0, %2
\n\t
"
:
"=&r"
(
v
.
hl
[
0
]),
"=r"
(
v
.
hl
[
1
]
)
:
"=&r"
(
v
)
:
"m"
(
*
(
const
uint32_t
*
)
p
),
"m"
(
*
((
const
uint32_t
*
)
p
+
1
)));
:
"m"
(
*
(
const
uint32_t
*
)
p
),
"m"
(
*
((
const
uint32_t
*
)
p
+
1
)));
return
v
.
v
;
return
v
;
}
}
#define AV_WN64 AV_WN64
#define AV_WN64 AV_WN64
static
av_always_inline
void
AV_WN64
(
void
*
p
,
uint64_t
v
)
static
av_always_inline
void
AV_WN64
(
void
*
p
,
uint64_t
v
)
{
{
union
{
uint64_t
v
;
uint32_t
hl
[
2
];
}
vv
=
{
v
};
__asm__
(
"str %Q2, %0
\n\t
"
__asm__
(
"str %2, %0
\n\t
"
"str %R2, %1
\n\t
"
"str %3, %1
\n\t
"
:
"=m"
(
*
(
uint32_t
*
)
p
),
"=m"
(
*
((
uint32_t
*
)
p
+
1
))
:
"=m"
(
*
(
uint32_t
*
)
p
),
"=m"
(
*
((
uint32_t
*
)
p
+
1
))
:
"r"
(
v
v
.
hl
[
0
]),
"r"
(
vv
.
hl
[
1
]
));
:
"r"
(
v
));
}
}
#endif
/* HAVE_INLINE_ASM */
#endif
/* HAVE_INLINE_ASM */
...
...
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